45 resultados para HPC parallel computer architecture queues fault tolerance programmability ADAM


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Monte Carlo simulation results for pure liquid acetone and water-acetone mixtures calculated in the isothermal and isobaric (NPT) ensemble at T=298K and p=1.0atm are presented. The TIP4P model was used for water and optimized potential for liquid simulation (OPLS) force field parameters used for acetone. The results obtained for the average configurational energy as a function of the mole fraction are in good accord with experimental data. Energy partitioning and co-ordination numbers results calculated for equimolar water-acetone solution are compared to similar data obtained for other water-organic liquid mixtures. These results show an increase in water-water interaction energy and co-ordination numbers when the interaction between water and organic liquid molecules decrease. Distribution functions for pure liquid acetone and water-acetone mixtures are presented. Dipole-dipole angular correlation functions obtained for pure liquid acetone show a predominance of dimers with parallel alignment of dipole moments. Radial distribution functions from water-acetone interaction show characteristic features of hydrogen bonded liquids. Radial and angular distribution functions for water-water correlation calculated in pure water and in equimolar water-acetone mixture are compared, showing very similar features in both systems. (C) 1999 Elsevier B.V. B.V. All rights reserved.

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This work presents the design of a fuzzy controller with simplified architecture. This architecture tries to minimize the time processing used in? the several stages of hazy modeling of systems and processes. The basic procedures of fuzzification and defuzzification are simplified to the maximum while the inference procedures are computed in private way. Therefore, the simplified architecture allows a fast and easy configuration of the fuzzy controller.All rules that define the control actions are determined by inference procedures and the defuzzification is made automatically using a simplified algorithm. The fuzzy controller operation is standardized and the control actions are previously calculated For general-purpose application? ann results, the industrial systems of fluid pow cona ol will be considered.

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A bifilar Bi-2212 bulk coil with parallel shunt resistor was tested under fault current condition using a 3 MVA single-phase transformer in a 220 V-60 Hz line achieving fault current peak of 8 kA. The fault current tests are performed from steady state peak current of 200 A by applying controlled short circuits up to 8 kA varying the time period from one to six cycles. The test results show the function of the shunt resistor providing homogeneous quench behavior of the HTS coil besides its intrinsic stabilizing role. The limiting current ratio achieves a factor 4.2 during 5 cycles without any degradation.

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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This paper adresses the problem on processing biological data such as cardiac beats, audio and ultrasonic range, calculating wavelet coefficients in real time, with processor clock running at frequency of present ASIC's and FPGA. The Paralell Filter Architecture for DWT has been improved, calculating wavelet coefficients in real time with hardware reduced to 60%. The new architecture, which also processes IDWT, is implemented with the Radix-2 or the Booth-Wallace Constant multipliers. Including series memory register banks, one integrated circuit Signal Analyzer, ultrasonic range, is presented.

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A Fault Current Limiter (FCL) based on high temperature superconducting elements with four tapes in parallel were designed and tested in 220 V line for a fault current peak between 1 kA to 4 kA. The elements employed second generation (2G) HTS tapes of YBCO coated conductor with stainless steel reinforcement. The tapes were electrically connected in parallel with effective length of 0.4 m per element (16 elements connected in series) constituting a single-phase unit. The FCL performance was evaluated through over-current tests and its recovery characteristics under load current were analyzed using optimized value of the shunt protection. The projected limiting ratio achieved a factor higher than 4 during fault of 5 cycles without degradation. Construction details and further test results will be shown in the paper. © 2010 IOP Publishing Ltd.

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This paper proposes a new approach for optimal phasor measurement units placement for fault location on electric power distribution systems using Greedy Randomized Adaptive Search Procedure metaheuristic and Monte Carlo simulation. The optimized placement model herein proposed is a general methodology that can be used to place devices aiming to record the voltage sag magnitudes for any fault location algorithm that uses voltage information measured at a limited set of nodes along the feeder. An overhead, three-phase, three-wire, 13.8 kV, 134-node, real-life feeder model is used to evaluate the algorithm. Tests show that the results of the fault location methodology were improved thanks to the new optimized allocation of the meters pinpointed using this methodology. © 2011 IEEE.

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Software Transactional Memory (STM) systems have poor performance under high contention scenarios. Since many transactions compete for the same data, most of them are aborted, wasting processor runtime. Contention management policies are typically used to avoid that, but they are passive approaches as they wait for an abort to happen so they can take action. More proactive approaches have emerged, trying to predict when a transaction is likely to abort so its execution can be delayed. Such techniques are limited, as they do not replace the doomed transaction by another or, when they do, they rely on the operating system for that, having little or no control on which transaction should run. In this paper we propose LUTS, a Lightweight User-Level Transaction Scheduler, which is based on an execution context record mechanism. Unlike other techniques, LUTS provides the means for selecting another transaction to run in parallel, thus improving system throughput. Moreover, it avoids most of the issues caused by pseudo parallelism, as it only launches as many system-level threads as the number of available processor cores. We discuss LUTS design and present three conflict-avoidance heuristics built around LUTS scheduling capabilities. Experimental results, conducted with STMBench7 and STAMP benchmark suites, show LUTS efficiency when running high contention applications and how conflict-avoidance heuristics can improve STM performance even more. In fact, our transaction scheduling techniques are capable of improving program performance even in overloaded scenarios. © 2011 Springer-Verlag.

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Increased accessibility to high-performance computing resources has created a demand for user support through performance evaluation tools like the iSPD (iconic Simulator for Parallel and Distributed systems), a simulator based on iconic modelling for distributed environments such as computer grids. It was developed to make it easier for general users to create their grid models, including allocation and scheduling algorithms. This paper describes how schedulers are managed by iSPD and how users can easily adopt the scheduling policy that improves the system being simulated. A thorough description of iSPD is given, detailing its scheduler manager. Some comparisons between iSPD and Simgrid simulations, including runs of the simulated environment in a real cluster, are also presented. © 2012 IEEE.

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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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Self-adaptive Software (SaS) presents specific characteristics compared to traditional ones, as it makes possible adaptations to be incorporated at runtime. These adaptations, when manually performed, normally become an onerous, error-prone activity. In this scenario, automated approaches have been proposed to support such adaptations; however, the development of SaS is not a trivial task. In parallel, reference architectures are reusable artifacts that aggregate the knowledge of architectures of software systems in specific domains. They have facilitated the development, standardization, and evolution of systems of those domains. In spite of their relevance, in the SaS domain, reference architectures that could support a more systematic development of SaS are not found yet. Considering this context, the main contribution of this paper is to present a reference architecture based on reflection for SaS, named RA4SaS (Reference Architecture for SaS). Its main purpose is to support the development of SaS that presents adaptations at runtime. To show the viability of this reference architecture, a case study is presented. As result, it has been observed that RA4SaS has presented good perspective to efficiently contribute to the area of SaS.

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Pós-graduação em Engenharia Mecânica - FEG

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The resistive-type superconducting fault current limiters (RSFCL) prototypes using YBCO-coated conductors have shown current limitation for medium voltage class applications for acting time up to 80 ms. By connecting an air-core reactor in parallel with the RSFCL, thus making an hybrid current limiter, one can extend the acting time for up to 1 s. In this work, we report the performance of a hybrid current limiter subjected to an AC peak fault current of 2 kA during 1 s for which within the first 80 ms the SFCL limits the current concurrently with the air-core reactor, and for the remaining 920 ms, only the air-core reactor limits the current. In order to evaluate the actual conditions for subsequent reconnection of RSFCL to the power grid, the hybrid fault current limiter was tested varying the time interval for recovery from 900 ms and 1.2 s, followed again by the concurrent operation of the hybrid limiter during 1 s (SFCL during 80 ms). From this evaluation test, the recovery time can be measured and compared using the voltage peak generated in superconducting module from the first and second fault test. The recovery time was also determined through the pulsed current method (PCM) on short-length sample test. The results showed that the fault current was limited from 1.9 kA down to 514 A after 1 cycle of 60 Hz frequency, with recovery time lower than 1.2 s for two subsequent fault current tests.

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Neural networks are dynamic systems consisting of highly interconnected and parallel nonlinear processing elements that are shown to be extremely effective in computation. This paper presents an architecture of recurrent neural networks for solving the N-Queens problem. More specifically, a modified Hopfield network is developed and its internal parameters are explicitly computed using the valid-subspace technique. These parameters guarantee the convergence of the network to the equilibrium points, which represent a solution of the considered problem. The network is shown to be completely stable and globally convergent to the solutions of the N-Queens problem. A fuzzy logic controller is also incorporated in the network to minimize convergence time. Simulation results are presented to validate the proposed approach.