A transactional runtime system for the Cell/BE architecture


Autoria(s): Baldassin, Alexandro José; Goldstein, Felipe; Azevedo, Rodolfo
Contribuinte(s)

Universidade Estadual Paulista (UNESP)

Data(s)

20/05/2014

20/05/2014

01/12/2012

Resumo

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Processo FAPESP: 11/19373-6

Single-core architectures have hit the end of the road and industry and academia are currently exploiting new multicore design alternatives. In special, heterogeneous multicore architectures have attracted a lot of attention but developing applications for such architectures is not an easy task due to the lack of appropriate tools and programming models. We present the design of a runtime system for the Cell/BE architecture that works with memory transactions. Transactional programs are automatically instrumented by the compiler, shortening development time and avoiding synchronization mistakes usually present in lock-based approaches (such as deadlock). Experimental results conducted with a prototype implementation and the STAMP benchmark show good scalability for applications with moderate to low contention levels, and whose transactions are not too small. For those cases in which a small performance loss is admissible, we believe that the ease of programming provided by transactions greatly pays off. (C) 2012 Elsevier B.V. All rights reserved.

Formato

1535-1546

Identificador

http://dx.doi.org/10.1016/j.jpdc.2012.08.001

Journal of Parallel and Distributed Computing. San Diego: Academic Press Inc. Elsevier B.V., v. 72, n. 12, p. 1535-1546, 2012.

0743-7315

http://hdl.handle.net/11449/42030

10.1016/j.jpdc.2012.08.001

WOS:000310669600001

Idioma(s)

eng

Publicador

Academic Press Inc. Elsevier B.V.

Relação

Journal of Parallel and Distributed Computing

Direitos

closedAccess

Palavras-Chave #Multiprocessors #Parallel programming #Transactional memory
Tipo

info:eu-repo/semantics/article