Common architecture for discrete wavelet transform analysis and synthesis with sequential and constant processing elements


Autoria(s): Cox, Pedro Henrique; Carvalho, Aparecido Augusto de
Contribuinte(s)

Universidade Estadual Paulista (UNESP)

Data(s)

27/05/2014

27/05/2014

08/10/2004

Resumo

This paper adresses the problem on processing biological data such as cardiac beats, audio and ultrasonic range, calculating wavelet coefficients in real time, with processor clock running at frequency of present ASIC's and FPGA. The Paralell Filter Architecture for DWT has been improved, calculating wavelet coefficients in real time with hardware reduced to 60%. The new architecture, which also processes IDWT, is implemented with the Radix-2 or the Booth-Wallace Constant multipliers. Including series memory register banks, one integrated circuit Signal Analyzer, ultrasonic range, is presented.

Formato

45-50

Identificador

http://dx.doi.org/10.1109/IMTC.2004.1350991

Conference Record - IEEE Instrumentation and Measurement Technology Conference, v. 1, p. 45-50.

1091-5281

http://hdl.handle.net/11449/67903

10.1109/IMTC.2004.1350991

2-s2.0-4644336400

Idioma(s)

eng

Relação

Conference Record - IEEE Instrumentation and Measurement Technology Conference

Direitos

closedAccess

Palavras-Chave #Discrete Wavelet Transform #FPGA #Signal Analyzer #VHDL #Wavelet signal processing #Discrete wavelet transforms #Signal analyzers #Application specific integrated circuits #Cardiovascular system #CMOS integrated circuits #Computer hardware #Data processing #Field programmable gate arrays #Formal logic #Real time systems #Software prototyping #Ultrasonic waves #Wavelet transforms #Digital signal processing
Tipo

info:eu-repo/semantics/conferencePaper