Model analític de les característiques DC de transistors de doble porta

En aquest treball s’implementa un model analític de les característiques DC del MOSFET de doble porta (DG-MOSFET), basat en la solució de l’equació de Poisson i en la teoria de deriva-difussió[1]. El MOSFET de doble porta asimètric presenta una gran flexibilitat en el disseny de la tensió llindar i del corrent OFF. El model analític reprodueix les característiques DC del DG-MOSFET de canal llarg i és la base per construir models circuitals tipus SPICE.

Simulations of parasitic and intrinsic capacitances related to Multiple-Gate-Field-Effect Transistor architectures

Report for the scientific sojourn carried out at the Université Catholique de Louvain, Belgium, from March until June 2007. In the first part, the impact of important geometrical parameters such as source and drain thickness, fin spacing, spacer width, etc. on the parasitic fringing capacitance component of multiple-gate field-effect transistors (MuGFET) is deeply analyzed using finite element simulations. Several architectures such as single gate, FinFETs (double gate), triple-gate represented by Pi-gate MOSFETs are simulated and compared in terms of channel and fringing capacitances for the same occupied die area. Simulations highlight the great impact of diminishing the spacing between fins for MuGFETs and the trade-off between the reduction of parasitic source and drain resistances and the increase of fringing capacitances when Selective Epitaxial Growth (SEG) technology is introduced. The impact of these technological solutions on the transistor cut-off frequencies is also discussed. The second part deals with the study of the effect of the volume inversion (VI) on the capacitances of undoped Double-Gate (DG) MOSFETs. For that purpose, we present simulation results for the capacitances of undoped DG MOSFETs using an explicit and analytical compact model. It monstrates that the transition from volume inversion regime to dual gate behaviour is well simulated. The model shows an accurate dependence on the silicon layer thickness,consistent withtwo dimensional numerical simulations, for both thin and thick silicon films. Whereas the current drive and transconductance are enhanced in volume inversion regime, our results show thatintrinsic capacitances present higher values as well, which may limit the high speed (delay time) behaviour of DG MOSFETs under volume inversion regime.

Low temperature amorphous and nanocrystalline silicon thin film transistors deposited by Hot-Wire CVD on glass substrate

Amorphous and nanocrystalline silicon films obtained by Hot-Wire Chemical Vapor Deposition have been incorporated as active layers in n-type coplanar top gate thin film transistors deposited on glass substrates covered with SiO 2. Amorphous silicon devices exhibited mobility values of 1.3 cm 2 V - 1 s - 1, which are very high taking into account the amorphous nature of the material. Nanocrystalline transistors presented mobility values as high as 11.5 cm 2 V - 1 s - 1 and resulted in low threshold voltage shift (∼ 0.5 V).

Stability of hydrogenated nanocrystalline silicon thin-film transistors

Hydrogenated nanocrystalline silicon thin-films were obtained by catalytic chemical vapour deposition at low substrate temperatures (150°C) and high deposition rates (10 Å/s). These films, with crystalline fractions over 90%, were incorporated as the active layers of bottom-gate thin-film transistors. The initial field-effect mobilities of these devices were over 0.5 cm 2/V s and the threshold voltages lower than 4 V. In this work, we report on the enhanced stability of these devices under prolonged times of gate bias stress compared to amorphous silicon thin-film transistors. Hence, they are promising candidates to be considered in the future for applications such as flat-panel displays.

Electronic transport in low temperature nanocrystalline silicon thin-film transistors obtained by Hot-Wire CVD

Hydrogenated nanocrystalline silicon (nc-Si:H) obtained by hot-wire chemical vapour deposition (HWCVD) at low substrate temperature (150 °C) has been incorporated as the active layer in bottom-gate thin-film transistors (TFTs). These devices were electrically characterised by measuring in vacuum the output and transfer characteristics for different temperatures. The field-effect mobility showed a thermally activated behaviour which could be attributed to carrier trapping at the band tails, as in hydrogenated amorphous silicon (a-Si:H), and potential barriers for the electronic transport. Trapped charge at the interfaces of the columns, which are typical in nc-Si:H, would account for these barriers. By using the Levinson technique, the quality of the material at the column boundaries could be studied. Finally, these results were interpreted according to the particular microstructure of nc-Si:H.

Thin Film Transistors obtained by Hot-Wire CVD

Hydrogenated microcrystalline silicon films obtained at low temperature (150-280°C) by hot wire chemical vapour deposition at two different process pressures were measured by Raman spectroscopy, X-ray diffraction (XRD) spectroscopy and photothermal deflection spectroscopy (PDS). A crystalline fraction >90% with a subgap optical absortion 10 cm -1 at 0.8 eV were obtained in films deposited at growth rates >0.8 nm/s. These films were incorporated in n-channel thin film transistors and their electrical properties were measured. The saturation mobility was 0.72 ± 0.05 cm 2/ V s and the threshold voltage around 0.2 eV. The dependence of their conductance activation energies on gate voltages were related to the properties of the material.

Top-gate microcrystalline silicon TFTs processed at low temperature (<200ºC)

N-type as well P-type top-gate microcrystalline silicon thin film transistors (TFTs) are fabricated on glass substrates at a maximum temperature of 200 °C. The active layer is an undoped μc-Si film, 200 nm thick, deposited by Hot-Wire Chemical Vapor. The drain and source regions are highly phosphorus (N-type TFTs) or boron (P-type TFTs)-doped μc-films deposited by HW-CVD. The gate insulator is a silicon dioxide film deposited by RF sputtering. Al-SiO 2-N type c-Si structures using this insulator present low flat-band voltage,-0.2 V, and low density of states at the interface D it=6.4×10 10 eV -1 cm -2. High field effect mobility, 25 cm 2/V s for electrons and 1.1 cm 2/V s for holes, is obtained. These values are very high, particularly the hole mobility that was never reached previously.

Bipolar pulsed excitation of erbium-doped nanosilicon light emitting diodes

High quantum efficiency erbium doped silicon nanocluster (Si-NC:Er) light emitting diodes (LEDs) were grown by low-pressure chemical vapor deposition (LPCVD) in a complementary metal-oxide-semiconductor (CMOS) line. Erbium (Er) excitation mechanisms under direct current (DC) and bipolar pulsed electrical injection were studied in a broad range of excitation voltages and frequencies. Under DC excitation, Fowler-Nordheim tunneling of electrons is mediated by Er-related trap states and electroluminescence originates from impact excitation of Er ions. When the bipolar pulsed electrical injection is used, the electron transport and Er excitation mechanism change. Sequential injection of electrons and holes into silicon nanoclusters takes place and nonradiative energy transfer to Er ions is observed. This mechanism occurs in a range of lower driving voltages than those observed in DC and injection frequencies higher than the Er emission rate.

Hydrogen-induced changes in the breakdown voltage of InP HEMTs

In this work, electrical measurements show that the breakdown voltage,BVDG, of InP HEMTs increases following exposure to H2. This BVDG shift is nonrecoverable. The increase in BVDG is found to be due to a decrease in the carrier concentration in the extrinsic portion of the device.We provide evidence that H2 reacts with the exposed InAlAs surface in the extrinsic region next to the gate, changing the underlying carrier concentration. Hall measurements of capped and uncapped HEMT samples show that the decrease in sheet carrier concentration can be attributed to a modification of the exposed InAlAs surface. Consistent with this, XPS experiments on uncapped heterostructures give evidence of As loss from the InAlAs surface upon exposure to hydrogen.

Functional remediation for bipolar disorder

Neurocognitive impairment constitutes a core feature of bipolar illness. The main domains affected are verbal memory, attention, and executive functions. Deficits in these areas as well as difficulties to get functional remission seem to be increased associated with illness progression. Several studies have found a strong relationship between neurocognitive impairment and low functioning in bipolar disorder, as previously reported in other illnesses such as schizophrenia. Cognitive remediation strategies, adapted from work conducted with traumatic brain injury patients and applied to patients with schizophrenia, also need to be adapted to individuals with bipolar disorders. Early intervention using functional remediation, involves neurocognitive techniques and training, but also psychoeducation on cognition-related issues and problem-solving within an ecological framework.