Model analític de les característiques DC de transistors de doble porta

En aquest treball s’implementa un model analític de les característiques DC del MOSFET de doble porta (DG-MOSFET), basat en la solució de l’equació de Poisson i en la teoria de deriva-difussió[1]. El MOSFET de doble porta asimètric presenta una gran flexibilitat en el disseny de la tensió llindar i del corrent OFF. El model analític reprodueix les característiques DC del DG-MOSFET de canal llarg i és la base per construir models circuitals tipus SPICE.

Low temperature amorphous and nanocrystalline silicon thin film transistors deposited by Hot-Wire CVD on glass substrate

Amorphous and nanocrystalline silicon films obtained by Hot-Wire Chemical Vapor Deposition have been incorporated as active layers in n-type coplanar top gate thin film transistors deposited on glass substrates covered with SiO 2. Amorphous silicon devices exhibited mobility values of 1.3 cm 2 V - 1 s - 1, which are very high taking into account the amorphous nature of the material. Nanocrystalline transistors presented mobility values as high as 11.5 cm 2 V - 1 s - 1 and resulted in low threshold voltage shift (∼ 0.5 V).

Compositional influence on the electrical performance of zinc indium tin oxide transparent thin-film transistors

In this work, zinc indium tin oxide layers with different compositions are used as the active layer of thin film transistors. This multicomponent transparent conductive oxide is gaining great interest due to its reduced content of the scarce indium element. Experimental data indicate that the incorporation of zinc promotes the creation of oxygen vacancies. In thin-film transistors this effect leads to a higher threshold voltage values. The field-effect mobility is also strongly degraded, probably due to coulomb scattering by ionized defects. A post deposition annealing in air reduces the density of oxygen vacancies and improves the fieldeffect mobility by orders of magnitude. Finally, the electrical characteristics of the fabricated thin-film transistors have been analyzed to estimate the density of states in the gap of the active layers. These measurements reveal a clear peak located at 0.3 eV from the conduction band edge that could be attributed to oxygen vacancies.

Stability of hydrogenated nanocrystalline silicon thin-film transistors

Hydrogenated nanocrystalline silicon thin-films were obtained by catalytic chemical vapour deposition at low substrate temperatures (150°C) and high deposition rates (10 Å/s). These films, with crystalline fractions over 90%, were incorporated as the active layers of bottom-gate thin-film transistors. The initial field-effect mobilities of these devices were over 0.5 cm 2/V s and the threshold voltages lower than 4 V. In this work, we report on the enhanced stability of these devices under prolonged times of gate bias stress compared to amorphous silicon thin-film transistors. Hence, they are promising candidates to be considered in the future for applications such as flat-panel displays.

Compositional influence on the electrical performance of zinc indium tin oxide transparent thin-film transistors

In this work, zinc indium tin oxide layers with different compositions are used as the active layer of thin film transistors. This multicomponent transparent conductive oxide is gaining great interest due to its reduced content of the scarce indium element. Experimental data indicate that the incorporation of zinc promotes the creation of oxygen vacancies. In thin-film transistors this effect leads to a higher threshold voltage values. The field-effect mobility is also strongly degraded, probably due to coulomb scattering by ionized defects. A post deposition annealing in air reduces the density of oxygen vacancies and improves the fieldeffect mobility by orders of magnitude. Finally, the electrical characteristics of the fabricated thin-film transistors have been analyzed to estimate the density of states in the gap of the active layers. These measurements reveal a clear peak located at 0.3 eV from the conduction band edge that could be attributed to oxygen vacancies.

Electronic transport in low temperature nanocrystalline silicon thin-film transistors obtained by Hot-Wire CVD

Hydrogenated nanocrystalline silicon (nc-Si:H) obtained by hot-wire chemical vapour deposition (HWCVD) at low substrate temperature (150 °C) has been incorporated as the active layer in bottom-gate thin-film transistors (TFTs). These devices were electrically characterised by measuring in vacuum the output and transfer characteristics for different temperatures. The field-effect mobility showed a thermally activated behaviour which could be attributed to carrier trapping at the band tails, as in hydrogenated amorphous silicon (a-Si:H), and potential barriers for the electronic transport. Trapped charge at the interfaces of the columns, which are typical in nc-Si:H, would account for these barriers. By using the Levinson technique, the quality of the material at the column boundaries could be studied. Finally, these results were interpreted according to the particular microstructure of nc-Si:H.

Microcrystalline silicon thin film transistors obtained by Hot-Wire CVD

Polysilicon thin film transistors (TFT) are of great interest in the field of large area microelectronics, especially because of their application as active elements in flat panel displays. Different deposition techniques are in tough competition with the objective to obtain device-quality polysilicon thin films at low temperature. In this paper we present the preliminary results obtained with the fabrication of TFT deposited by hot-wire chemical vapor deposition (HWCVD). Some results concerned with the structural characterization of the material and electrical performance of the device are presented.

Thin Film Transistors obtained by Hot-Wire CVD

Hydrogenated microcrystalline silicon films obtained at low temperature (150-280°C) by hot wire chemical vapour deposition at two different process pressures were measured by Raman spectroscopy, X-ray diffraction (XRD) spectroscopy and photothermal deflection spectroscopy (PDS). A crystalline fraction >90% with a subgap optical absortion 10 cm -1 at 0.8 eV were obtained in films deposited at growth rates >0.8 nm/s. These films were incorporated in n-channel thin film transistors and their electrical properties were measured. The saturation mobility was 0.72 ± 0.05 cm 2/ V s and the threshold voltage around 0.2 eV. The dependence of their conductance activation energies on gate voltages were related to the properties of the material.