173 resultados para TiO2 nanotubular arrays
Resumo:
Bit level systolic array structures for computing sums of products are studied in detail. It is shown that these can be sub-divided into two classes and that, within each class, architectures can be described in terms of a set of constraint equations. It is further demonstrated that high performance system level functions with attractive VLSI properties can be constructed by matching data flow geometries in bit level and word level architectures.
Resumo:
Bit-level systolic-array structures for computing sums of products are studied in detail. It is shown that these can be subdivided into two classes and that within each class architectures can be described in terms of a set of constraint equations. It is further demonstrated that high-performance system-level functions with attractive VLSI properties can be constructed by matching data-flow geometries in bit-level and word-level architectures.
Resumo:
A systolic array is an array of individual processing cells each of which has some local memory and is connected only to its nearest neighbours in the form of a regular lattice. On each cycle of a simple clock every cell receives data from its neighbouring cells and performs a specific processing operation on it. The resulting data is stored within the cell and passed on to neighbouring cells on the next clock cycle. This paper gives an overview of work to date and illustrates the application of bit-level systolic arrays by means of two examples: (1) a pipelined bit-slice circuit for computing matrix x vector transforms; and (2) a bit serial structure for multi-bit convolution.
Resumo:
The mapping of matrix multiplied by matrix multiplication onto both word and bit level systolic arrays has been investigated. It has been found that well defined word and bit level data flow constraints must be satisfied within such circuits. An efficient and highly regular bit level array has been generated by exploiting the basic compatibilities in data flow symmetries at each level of the problem. A description of the circuit which emerges is given and some details relating to its practical implementation are discussed.
Resumo:
The use of bit-level systolic array circuits as building blocks in the construction of larger word-level systolic systems is investigated. It is shown that the overall structure and detailed timing of such systems may be derived quite simply using the dependence graph and cut-set procedure developed by S. Y. Kung (1988). This provides an attractive and intuitive approach to the bit-level design of many VLSI signal processing components. The technique can be applied to ripple-through and partly pipelined circuits as well as fully systolic designs. It therefore provides a means of examining the relative tradeoff between levels of pipelining, chip area, power consumption, and throughput rate within a given VLSI design.
Resumo:
A bit-level systolic array system for performing a binary tree vector quantization (VQ) codebook search is described. This is based on a highly regular VLSI building block circuit. The system in question exhibits a very high data rate suitable for a range of real-time applications. A technique is described which reduces the storage requirements of such a system by 50%, with a corresponding decrease in hardware complexity.
Resumo:
This paper describes the design and the architecture of a bit-level systolic array processor. The bit-level systolic array described is directly applicable to a wide range of image processing operations where high performance and throughput are essential. The architecture is illustrated by describing the operation of the correlator and convolver chips which are being developed. The advantage of the system is also discussed.
Resumo:
A novel bit-level systolic array architecture for implementing IIR (infinite-impulse response) filter sections is presented. A first-order section achieves a latency of only two clock cycles by using a radix-2 redundant number representation, performing the recursive computation most significant digit first, and feeding back each digit of the result as soon as it is available. The design is extended to produce a building block from which second- and higher-order sections can be connected.
Resumo:
A plethora of studies have described the in vitro assessment of dissolving microneedle (MN) arrays for enhanced transdermal drug delivery, utilising a wide variety of model membranes as a representation of the skin barrier. However, to date, no discussion has taken place with regard to the choice of model skin membrane and the impact this may have on the evaluation of MN performance. In this study, we have, for the first time, critically assessed the most common types of in vitro skin permeation models - a synthetic hydrophobic membrane (Silescol(®) of 75 µm) and neonatal porcine skin of definable thickness (300-350 µm and 700-750 µm) - for evaluating the performance of drug loaded dissolving poly (methyl vinyl ether co maleic acid) (PMVE/MA) MN arrays. It was found that the choice of in vitro skin model had a significant effect on the permeation of a wide range of small hydrophilic molecules released from dissolving MNs. For example, when Silescol(®) was used as the model membrane, the cumulative percentage permeation of methylene blue 24h after the application of dissolvable MNs was found to be only approximately 3.7% of the total methylene blue loaded into the MN device. In comparison, when dermatomed and full thickness neonatal porcine skin were used as a skin model, approximately 67.4% and 47.5% of methylene blue loaded into the MN device was delivered across the skin 24h after the application of MN arrays, respectively. The application of methylene blue loaded MN arrays in a rat model in vivo revealed that the extent of MN-mediated percutaneous delivery achieved was most similar to that predicted from the in vitro investigations employing dermatomed neonatal porcine skin (300-350 µm) as the model skin membrane. On the basis of these results, a wider discussion within the MN community will be necessary to standardise the experimental protocols used for the evaluation and comparison of MN devices.
Resumo:
Design and evaluation of a novel laser-based method for micromoulding of microneedle arrays from polymeric materials under ambient conditions. The aim of this study was to optimise polymeric composition and assess the performance of microneedle devices that possess different geometries.
Resumo:
The efficacious delivery of antigens to antigen-presenting cells (APCs), in particular, to dendritic cells (DCs), and their subsequent activation remains a significant challenge in the development of effective vaccines. This study highlights the potential of dissolving microneedle (MN) arrays laden with nanoencapsulated antigen to increase vaccine immunogenicity by targeting antigen specifically to contiguous DC networks within the skin. Following in situ uptake, skin-resident DCs were able to deliver antigen-encapsulated poly-d,l-lactide-co-glycolide (PGLA) nanoparticles to cutaneous draining lymph nodes where they subsequently induced significant expansion of antigen-specific T cells. Moreover, we show that antigen-encapsulated nanoparticle vaccination via microneedles generated robust antigen-specific cellular immune responses in mice. This approach provided complete protection in vivo against both the development of antigen-expressing B16 melanoma tumors and a murine model of para-influenza, through the activation of antigen-specific cytotoxic CD8(+) T cells that resulted in efficient clearance of tumors and virus, respectively. In addition, we show promising findings that nanoencapsulation facilitates antigen retention into skin layers and provides antigen stability in microneedles. Therefore, the use of biodegradable polymeric nanoparticles for selective targeting of antigen to skin DC subsets through dissolvable MNs provides a promising technology for improved vaccination efficacy, compliance, and coverage.