Regression analysis of spatial data

Many of the most interesting questions ecologists ask lead to analyses of spatial data. Yet, perhaps confused by the large number of statistical models and fitting methods available, many ecologists seem to believe this is best left to specialists. Here, we describe the issues that need consideration when analysing spatial data and illustrate these using simulation studies. Our comparative analysis involves using methods including generalized least squares, spatial filters, wavelet revised models, conditional autoregressive models and generalized additive mixed models to estimate regression coefficients from synthetic but realistic data sets, including some which violate standard regression assumptions. We assess the performance of each method using two measures and using statistical error rates for model selection. Methods that performed well included generalized least squares family of models and a Bayesian implementation of the conditional auto-regressive model. Ordinary least squares also performed adequately in the absence of model selection, but had poorly controlled Type I error rates and so did not show the improvements in performance under model selection when using the above methods. Removing large-scale spatial trends in the response led to poor performance. These are empirical results; hence extrapolation of these findings to other situations should be performed cautiously. Nevertheless, our simulation-based approach provides much stronger evidence for comparative analysis than assessments based on single or small numbers of data sets, and should be considered a necessary foundation for statements of this type in future.

From bit level systolic arrays to HDTV processor chips

The initial part of this paper reviews the early challenges (c 1980) in achieving real-time silicon implementations of DSP computations. In particular, it discusses research on application specific architectures, including bit level systolic circuits that led to important advances in achieving the DSP performance levels then required. These were many orders of magnitude greater than those achievable using programmable (including early DSP) processors, and were demonstrated through the design of commercial digital correlator and digital filter chips. As is discussed, an important challenge was the application of these concepts to recursive computations as occur, for example, in Infinite Impulse Response (IIR) filters. An important breakthrough was to show how fine grained pipelining can be used if arithmetic is performed most significant bit (msb) first. This can be achieved using redundant number systems, including carry-save arithmetic. This research and its practical benefits were again demonstrated through a number of novel IIR filter chip designs which at the time, exhibited performance much greater than previous solutions. The architectural insights gained coupled with the regular nature of many DSP and video processing computations also provided the foundation for new methods for the rapid design and synthesis of complex DSP System-on-Chip (SoC), Intellectual Property (IP) cores. This included the creation of a wide portfolio of commercial SoC video compression cores (MPEG2, MPEG4, H.264) for very high performance applications ranging from cell phones to High Definition TV (HDTV). The work provided the foundation for systematic methodologies, tools and design flows including high-level design optimizations based on "algorithmic engineering" and also led to the creation of the Abhainn tool environment for the design of complex heterogeneous DSP platforms comprising processors and multiple FPGAs. The paper concludes with a discussion of the problems faced by designers in developing complex DSP systems using current SoC technology. © 2007 Springer Science+Business Media, LLC.

Systolic building block for high performance recursive filtering

A novel bit level systolic array is presented that can be used as a building block in the construction of recursive digital filters. The circuit accepts bit-parallel input data, is pipelined at the bit level, and exhibits a very high throughput rate. The most important feature of the circuit is that it allows recursive operations to be implemented directly without incurring the large m cycle latency (where m is approximately the word length) normally associated with such systems. The use of this circuit in the construction of both first- and second-order IIR (infinite-impulse-response) filters is described.

Algorithms and architectures for high performance recursive filtering

Recently, a number of most significant digit (msd) first bit parallel multipliers for recursive filtering have been reported. However, the design approach which has been used has, in general, been heuristic and consequently, optimality has not always been assured. In this paper, msd first multiply accumulate algorithms are described and important relationships governing the dependencies between latency, number representations, etc are derived. A more systematic approach to designing recursive filters is illustrated by applying the algorithms and associated relationships to the design of cascadable modules for high sample rate IIR filtering and wave digital filtering.

High performance VLSI architecture for Wave Digital Filtering

The application of fine grain pipelining techniques in the design of high performance Wave Digital Filters (WDFs) is described. It is shown that significant increases in the sampling rate of bit parallel circuits can be achieved using most significant bit (msb) first arithmetic. A novel VLSI architecture for implementing two-port adaptor circuits is described which embodies these ideas. The circuit in question is highly regular, uses msb first arithmetic and is implemented using simple carry-save adders. © 1992 Kluwer Academic Publishers.

Rapid design of discrete orthonormal wavelet transforms

A methodology which allows a non-specialist to rapidly design silicon wavelet transform cores has been developed. This methodology is based on a generic architecture utilizing time-interleaved coefficients for the wavelet transform filters. The architecture is scaleable and it has been parameterized in terms of wavelet family, wavelet type, data word length and coefficient word length. The control circuit is designed in such a way that the cores can also be cascaded without any interface glue logic for any desired level of decomposition. This parameterization allows the use of any orthonormal wavelet family thereby extending the design space for improved transformation from algorithm to silicon. Case studies for stand alone and cascaded silicon cores for single and multi-stage analysis respectively are reported. The typical design time to produce silicon layout of a wavelet based system has been reduced by an order of magnitude. The cores are comparable in area and performance to hand-crafted designs. The designs have been captured in VHDL so they are portable across a range of foundries and are also applicable to FPGA and PLD implementations.

Pipelined two-port adaptor for wave digital filtering

The application of fine-grain pipelining techniques in the design of high-performance wave digital filters (WDFs) is described. The problems of latency in feedback loops can be significantly reduced if computations are organized most significant, as opposed to least significant, bit first and if the results are fed back as soon as they are formed. The result is that chips can be designed which offer significantly higher sampling rates than otherwise can be obtained using conventional methods. How these concepts can be extended to the more challenging problem of WDFs is discussed. It is shown that significant increases in the sampling rate of bit-parallel circuits can be achieved using most significant bit first arithmetic.

Rapid silicon design of discrete orthonormal wavelet transforms based algorithms

A methodology has been developed which allows a non-specialist to rapidly design silicon wavelet transform cores for a variety of specifications. The cores include both forward and inverse orthonormal wavelet transforms. This methodology is based on efficient, modular and scaleable architectures utilising time-interleaved coefficients for the wavelet transform filters. The cores are parameterized in terms of wavelet type and data and coefficient word lengths. The designs have been captured in VHDL and are hence portable across a range of silicon foundries as well as FPGA and PLD implementations.

Rapid VLSI design of biorthogonal wavelet transform cores

A rapid design methodology for biorthogonal wavelet transform cores has been developed. This methodology is based on a generic, scaleable architecture for the wavelet filters. The architecture offers efficient hardware utilization by combining the linear phase property of biorthogonal filters with decimation in a MAC based implementation. The design has been captured in VHDL and parameterized in terms of wavelet type, data word length and coefficient word length. The control circuit is embedded within the cores and allows them to be cascaded without any interface glue logic for any desired level of decomposition. The design time to produce silicon layout of a biorthogonal wavelet based system is typically less than a day. The resulting silicon cores produced are comparable in area and performance to hand-crafted designs. The designs are portable across a range of foundries and are also applicable to FPGA and PLD implementations.

Optimized bit level architectures for IIR filtering

Optimized circuits for implementing high-performance bit-parallel IIR filters are presented. Circuits constructed mainly from simple carry save adders and based on most-significant-bit (MSB) first arithmetic are described. Two methods resulting in systems which are 100% efficient in that they are capable of sampling data every cycle are presented. In the first approach the basic circuit is modified so that the level of pipelining used is compatible with the small, but fixed, latency associated with the computation in question. This is achieved through insertion of pipeline delays (half latches) on every second row of cells. This produces an area-efficient solution in which the throughput rate is determined by a critical path of 76 gate delays. A second approach combines the MSB first arithmetic methods with the scattered look-ahead methods. Important design issues are addressed, including wordlength truncation, overflow detection, and saturation.

Comparing the influence of two different natural organic matter types on colloid deposition in saturated porous medium

Humic acid and protein are two major organic matter types encountered in natural and polluted environment, respectively. This study employed Triple Pulse Experiments (TPEs) to investigate and compare the influence of Suwannee River Humic Acid (SRHA) (model humic acid) and Bovine Serum Albumin (BSA) (model protein) on colloid deposition in a column packed with saturated iron oxide-coated quartz sand. Study results suggest that adsorbed SRHA may inhibit colloid deposition by occupying colloid sites on the porous medium. Conversely, BSA may promote colloid deposition by a 'filter ripening' mechanism. This study provides insight to understand the complex behavior of colloids in organic matter-presented aquifers and sand filters. © (2012) Trans Tech Publications, Switzerland.

Stretch-induced plasmonic anisotropy of self-assembled gold nanoparticle mats

Close-packed monolayers of 20 nm Au nanoparticles are self-assembled at hexane/water interfaces and transferred to elastic substrates. Stretching the resulting nanoparticle mats provides active and reversible tuning of their plasmonic properties, with a clear polarization dependance. Both uniaxial and biaxial strains induce strong blue shifts in the plasmonic resonances. This matches theoretical simulations and indicates that plasmonic coupling at nanometer scale distances is responsible for the observed spectral tuning. Such stretch-tunable metal nanoparticle mats can be exploited for the development of optical devices, such as flexible colour filters and molecular sensors. (C) 2012 American Institute of Physics. [doi:10.1063/1.3683535]

Association Analysis of Dyslipidemia-Related Genes in Diabetic Nephropathy

Type 1 diabetes (T1D) increases risk of the development of microvascular complications and cardiovascular disease (CVD). Dyslipidemia is a common risk factor in the pathogenesis of both CVD and diabetic nephropathy (DN), with CVD identified as the primary cause of death in patients with DN. In light of this commonality, we assessed single nucleotide polymorphisms (SNPs) in thirty-seven key genetic loci previously associated with dyslipidemia in a T1D cohort using a casecontrol design. SNPs (n = 53) were genotyped using Sequenom in 1467 individuals with T1D (718 cases with proteinuric nephropathy and 749 controls without nephropathy i.e. normal albumin excretion). Cases and controls were white and recruited from the UK and Ireland. Association analyses were performed using PLINK to compare allele frequencies in cases and controls. In a sensitivity analysis, samples from control individuals with reduced renal function (estimated glomerular filtration rate,60 ml/min/1.73 m2) were excluded. Correction for multiple testing was performed by permutation testing. A total of 1394 samples passed quality control filters. Following regression analysis adjusted by collection center, gender, duration of diabetes, and average HbA1c, two SNPs were significantly associated with DN. rs4420638 in the APOC1 region (odds ratio [OR] = 1.51; confidence intervals [CI]: 1.19–1.91; P = 0.001) and rs1532624 in CETP (OR = 0.82; CI: 0.69–0.99; P = 0.034); rs4420638 was also significantly associated in a sensitivity analysis (P = 0.016) together with rs7679 (P = 0.027). However, no association was significant following correction for multiple testing. Subgroup analysis of end-stage renal disease status failed to reveal any association. Our results suggest common variants associated with dyslipidemia are not strongly associated with DN in T1D among white individuals. Our findings, cannot entirely exclude these key genes which are central to the process of dyslipidemia, from involvement in DN pathogenesis as our study had limited power to detect variants of small effect size. Analysis in larger independent cohorts is required.

Three dimensional analysis of the lamina cribrosa in glaucoma

Background/aim: Structural changes in the lamina cribrosa have been implicated in the pathogenesis of glaucomatous optic atrophy. The aim of this study was to determine a measure the surface variability of the cup floor in normal subjects and patients with glaucoma. Methods: A sample of age matched normal subjects (NN), patients with low tension glaucoma (LTG), and primary open angle glaucoma (POAG) were included in the study. The glaucoma groups were matched for the severity of the visual field loss. Mean 10 degree topographic images of normal and glaucomatous eyes from the Heidelberg retina tomograph were imported into ERDAS image processing software where topographic analysis of the cup floor could be assessed. Each image was processed using customised spatial filters that calculated the surface depth variation in localised neighbourhood areas across each image. The local change in depth across the cup floor surface was determined and compared between the three clinical groups. Results: The depth variation in the cup floor was largest in normal subjects followed by LTG and POAG. Highly statistically significant differences in surface depth variability of the cup floor existed between normal and LTG (p=0.005), between normal and POAG (p

Detection of pathogen based on the catalytic growth of gold nanocrystals

A homogenous detection of pathogen (Giardia lamblia cysts) based on the catalytic growth of gold nanoparticles (AuNPs) has been studied. In this study, centrifugal filters were employed as tools to concentrate and separate the pathogen cells, and moreover amplify the detection signal. The catalytic growth of gold nanoparticles was verified to be positively related to gold seeds concentration. On this basis, homogenous detection of the pathogenic bacteria in liquid phase was established by means of conjugating antibody to gold seeds. Under the given experimental condition, detection limit of G. lamblia cysts was determined as low as 1.088 × 103 cells ml-1. The additional nonspecific binding tests were also conducted to verify the detection specificity. This sensing platform has been proved to be a sensitive, reliable and simple method for large-scale pathogen detection, and provide valuable insight for the development of gold nanocrystals based colorimetric biosensors.