Fabrication and characterisation of high resistivity SOI substrates for monolithic high energy physics detectors

Silicon on Insulator (SOI) substrates offer a promising platform for monolithic high energy physics detectors with integrated read-out electronics and pixel diodes. This paper describes the fabrication and characterisation of specially-configured SOI substrates using improved bonded wafer ion split and grind/polish technologies. The crucial interface between the high resistivity handle silicon and the SOI buried oxide has been characterised using both pixel diodes and circular geometry MOS transistors. Pixel diode breakdown voltages were typically greater than 100V and average leakage current densities at 70 V were only 55 nA/ sq cm. MOS transistors subjected to 24 GeV proton irradiation showed an increased SOI buried oxide trapped charge of only 3.45x1011cn-2 for a dose of 2.7Mrad

Hybrid FIB milling strategy for the fabrication of plasmonic nanostructures on semiconductor substrates

The optical properties of plasmonic semiconductor devices fabricated by focused ion beam (FIB) milling deteriorate because of the amorphisation of the semiconductor substrate. This study explores the effects of combining traditional 30 kV FIB milling with 5 kV FIB patterning to minimise the semiconductor damage and at the same time maintain high spatial resolution. The use of reduced acceleration voltages is shown to reduce the damage from higher energy ions on the example of fabrication of plasmonic crystals on semiconductor substrates leading to 7-fold increase in transmission. This effect is important for focused-ion beam fabrication of plasmonic structures integrated with photodetectors, light-emitting diodes and semiconductor lasers.