Electronic structure of the nitrogen-vacancy center in diamond from first-principles theory

The nitrogen-vacancy (NV) center is a paramagnetic defect in diamond with applications as a qubit. Here, we investigate its electronic structure by using ab initio density functional theory for five different NV center models of two different cluster sizes. We describe the symmetry and energetics of the low-lying states and compare the optical frequencies obtained to experimental results. We compute the major transition of the negatively charged NV centers to within 25–100 meV accuracy and find that it is energetically favorable for substitutional nitrogens to donate an electron to NV0. The excited state of the major transition and the NV0 state with a neutral donor nitrogen are found to be close in energy.

Spatially resolved diagnostics on a micro atmospheric pressure plasma jet

Despite enormous potential for technological applications, fundamentals of stable non-equilibrium micro-plasmas at ambient pressure are still only partly understood. Micro-plasma jets are one sub-group of these plasma sources. For an understanding it is particularly important to analyse transport phenomena of energy and particles within and between the core and effluent of the discharge. The complexity of the problem requires the combination and correlation of various highly sophisticated diagnostics yielding different information with an extremely high temporal and spatial resolution. A specially designed rf microscale atmospheric pressure plasma jet (µ-APPJ) provides excellent access for optical diagnostics to the discharge volume and the effluent region. This allows detailed investigations of the discharge dynamics and energy transport mechanisms from the discharge to the effluent. Here we present examples for diagnostics applicable to different regions and combine the results. The diagnostics applied are optical emission spectroscopy (OES) in the visible and ultraviolet and two-photon absorption laser-induced fluorescence spectroscopy. By the latter spatially resolved absolutely calibrated density maps of atomic oxygen have been determined for the effluent. OES yields an insight into energy transport mechanisms from the core into the effluent. The first results of spatially and phase-resolved OES measurements of the discharge dynamics of the core are presented.

Crystallization and preliminary X-ray diffraction analysis of naphthalene dioxygenase from Rhodococcus sp strain NCIMB 12038

The three-component naphthalene dioxygenase (NDO) enzyme system carries out the first step in the aerobic degradation of naphthalene to (+)-cis-(1R,2S)-dihydroxy-1,2-dihydronaphthalene by Rhodococcus sp. strain NCIMB 12038. The terminal oxygenase component (naphthalene 1,2-dioxygenase) that catalyzes this reaction belongs to the aromatic ring hydroxylating dioxygenase family and has been crystallized. These enzymes utilize a mononuclear nonheme iron centre to catalyze the addition of dioxygen to their respective substrates. In this reaction, two electrons, two protons and a dioxygen molecule are consumed. The Rhodococcus enzyme has only 33 and 29% sequence identity to the corresponding alpha- and beta-subunits of the NDO system of Pseudomonas putida NCIMB 9816-4, for which the tertiary structure has been reported. In order to determine the three-dimensional structure of the Rhodococcus NDO, diffraction-quality crystals have been prepared by the hanging-drop method. The crystals belongs to space group P2(1)2(1)2(1), with unit-cell parameters a = 87.5, b = 144, c = 185.6 Angstrom, alpha = beta = gamma = 90degrees, and diffract to 2.3 Angstrom resolution.

Optimisation of trench isolated bipolar transistors on SOI substrates by 3D electro-thermal simulations

This paper provides a comprehensive analysis of thermal resistance of trench isolated bipolar transistors on SOI substrates based on 3D electro-thermal simulations calibrated to experimental data. The impact of emitter length, width, spacing and number of emitter fingers on thermal resistance is analysed in detail. The results are used to design and optimise transistors with minimum thermal resistance and minimum transistor area. (c) 2007 Elsevier Ltd. All rights reserved.

6-T SRAM cell design with nanoscale double-gate SOI MOSFETs: impact of source/drain engineering and circuit topology

The impact of source/drain engineering on the performance of a six-transistor (6-T) static random access memory (SRAM) cell, based on 22 nm double-gate (DG) SOI MOSFETs, has been analyzed using mixed-mode simulation, for three different circuit topologies for low voltage operation. The trade-offs associated with the various conflicting requirements relating to read/write/standby operations have been evaluated comprehensively in terms of eight performance metrics, namely retention noise margin, static noise margin, static voltage/current noise margin, write-ability current, write trip voltage/current and leakage current. Optimal design parameters with gate-underlap architecture have been identified to enhance the overall SRAM performance, and the influence of parasitic source/drain resistance and supply voltage scaling has been investigated. A gate-underlap device designed with a spacer-to-straggle (s/sigma) ratio in the range 2-3 yields improved SRAM performance metrics, regardless of circuit topology. An optimal two word-line double-gate SOI 6-T SRAM cell design exhibits a high SNM similar to 162 mV, I-wr similar to 35 mu A and low I-leak similar to 70 pA at V-DD = 0.6 V, while maintaining SNM similar to 30% V-DD over the supply voltage (V-DD) range of 0.4-0.9 V.

Performance projections and design optimization of planar double gate SOI MOSFETs for logic technology applications

In this paper, by investigating the influence of source/drain extension region engineering (also known as gate-source/drain underlap) in nanoscale planar double gate (DG) SOI MOSFETs, we offer new insights into the design of future nanoscale gate-underlap DG devices to achieve ITRS projections for high performance (HP), low standby power (LSTP) and low operating power (LOP) logic technologies. The impact of high-kappa gate dielectric, silicon film thickness, together with parameters associated with the lateral source/drain doping profile, is investigated in detail. The results show that spacer width along with lateral straggle can not only effectively control short-channel effects, thus presenting low off-current in a gate underlap device, but can also be optimized to achieve lower intrinsic delay and higher on-off current ratio (I-on/I-off). Based on the investigation of on-current (I-on), off-current (I-off), I-on/I-off, intrinsic delay (tau), energy delay product and static power dissipation, we present design guidelines to select key device parameters to achieve ITRS projections. Using nominal gate lengths for different technologies, as recommended from ITRS specification, optimally designed gate-underlap DG MOSFETs with a spacer-to-straggle (s/sigma) ratio of 2.3 for HP/LOP and 3.2 for LSTP logic technologies will meet ITRS projection. However, a relatively narrow range of lateral straggle lying between 7 to 8 nm is recommended. A sensitivity analysis of intrinsic delay, on-current and off-current to important parameters allows a comparative analysis of the various design options and shows that gate workfunction appears to be the most crucial parameter in the design of DG devices for all three technologies. The impact of back gate misalignment on I-on, I-off and tau is also investigated for optimized underlap devices.

Scaling issues for analogue circuits using Double Gate SOI transistors

This work presents a systematic analysis on the impact of source-drain engineering using gate

The impact of the intrinsic and extrinsic resistances of double gate SOI on RF performance

In this paper, the analogue performance of a 65 nm node double gate Sol (DGSOI) is qualitatively investigated using MixedMode simulation. The intrinsic resistance of the device is optimised by evaluating the impact of the source/drain engineering using variation of spacers and doping profile on the RF key figures of merit such as f(T), and f(MAX). It is evident that longer spacers, which approach the length of the gate offer better RF performance irrespective of the profile as long as the doping gradient at the gate edge is <7 nm/decade. Analytical expressions, which reflect the dependence of f(T), and fMAX on extrinsic source, drain and gate resistances R-S, R-D and R-G have been derived. While R-D and R-S have equal effect on f(T), R-D appears to be more influential than R-S in reducing f(MAX). The sensitivity of f(MAX) to R-S and R-D. has been shown to be greater than to R-G. (c) 2006 Elsevier Ltd. All rights reserved.

Engineering source/drain extension regions in nanoscale double gate (DG) SOI MOSFETs: Analytical model and design considerations

In this paper, we propose for the first time, an analytical model for short channel effects in nanoscale source/drain extension region engineered double gate (DG) SOI MOSFETs. The impact of (i) lateral source/drain doping gradient (d), (ii) spacer width (s), (iii) spacer to doping gradient ratio (s/d) and (iv) silicon film thickness (T-si), on short channel effects - threshold voltage (V-th) and subthreshold slope (S), on-current (I-on), off-current (I-on) and I-on/I-off is extensively analysed by using the analytical model and 2D device simulations. The results of the analytical model confirm well with simulated data over the entire range of spacer widths, doping gradients and effective channel lengths. Results show that lateral source/drain doping gradient along with spacer width can not only effectively control short channel effects, thus presenting low off-current, but can also be optimised to achieve high values of on-currents. The present work provides valuable design insights in the performance of nanoscale DG Sol devices with optimal source/drain engineering and serves as a tool to optimise important device and technological parameters for 65 nm technology node and below. (c) 2006 Elsevier Ltd. All rights reserved.

Extrinsic parameter extraction and RF modelling of CMOS

An analytical approach for CMOS parameter extraction which includes the effect of parasitic resistance is presented. The method is based on small-signal equivalent circuit valid in all region of operation to uniquely extract extrinsic resistances, which can be used to extend the industry standard BSIM3v3 MOSFET model for radio frequency applications. The verification of the model was carried out through frequency domain measurements of S-parameters and direct time domain measurement at 2.4 GHz in a large signal non-linear mode of operation. (C) 2003 Elsevier Ltd. All rights reserved.

Comparison between fluid simulations and experiments in inductively coupled argon/chlorine plasmas

Comparisons of 2D fluid simulations with experimental measurements of Ar/Cl-2 plasmas in a low-pressure inductively coupled reactor are reported. Simulations show that the wall recombination coefficient of Cl atom (gamma) is a crucial parameter of the model and that neutral densities are very sensitive to its variations. The best agreement between model and experiment is obtained for gamma = 0.02, which is much lower than the value predicted for stainless steel walls (gamma = 0.6). This is consistent with reactor wall contaminations classically observed in such discharges. The electron density, negative ion fraction and Cl atom density have been investigated under various conditions of chlorine and argon concentrations, gas pressure and applied rf input power. The plasma electronegativity decreases with rf power and increases with chlorine concentration. At high pressure, the power absorption and distribution of charged particles become more localized below the quartz window. Although the experimental trends are well reproduced by the simulations, the calculated charged particle densities are systematically overestimated by a factor of 3-5. The reasons for this discrepancy are discussed in the paper.

Fast imaging of an atmospheric pressure glow discharge in he with a polymer film

To visualize the development of an atmospheric pressure glow discharge in He and the influence of polymer film on the discharge, short exposure time images were recorded using a gated intensified charge coupled detector. If the polymer film is stretched in the middle of the gap, a discharge region on each side of the polymer is created with the characteristic structure of a glow discharge. In this case, strongly asymmetric discharge current pulses can be generated depending on the frequency and the applied voltage.

Atomic layer deposition of hafnium oxide dielectrics on silicon and germanium substrates

Hafnium oxide films have been deposited at 250 °C on silicon and germanium substrates by atomic layer deposition (ALD), using tetrakis-ethylmethylamino hafnium (TEMAH) and water vapour as precursors in a modified Oxford Instruments PECVD system. Self-limiting monolayer growth has been verified, characterised by a growth rate of 0.082 nm/ cycle. Layer uniformity is approximately within ±1% of the mean value. MOS capacitors have been fabricated by evaporating aluminium electrodes. CV analysis has been used to determine the bulk and interface properties of the HfO 2, and their dependence on pre-clean schedule, deposition conditions and post-deposition annealing. The dielectric constant of the HfO 2 is typically 18. On silicon, best results are obtained when the HfO 2 is deposited on a chemically oxidised hydrophilic surface. On germanium, best results are obtained when the substrate is nitrided before HfO 2 deposition, using an in-situ nitrogen plasma treatment. © Springer Science+Business Media, LLC 2007.

Au on (111) and (110) surfaces of CeO2: A density-functional theory study

The atomic structures of gold supported on (111) and (110) surfaces of CeO2 have been studied using density-functional theory calculations. A single Au atom is placed on three adsorption sites on the surfaces; the stoichiometric surfaces, an oxygen vacancy and a Ce-vacancy. It is found that (i) the Au adsorption energies are in the following order: E-ad(Ce-vacancy) > E-ad(O-vacancy) > E-ad(stoichiometric surface); and (ii) the Au atom adsorption on the Ce-vacancy activates O atoms nearby. One 0 atom is less stable than that in O-2 in the gas phase and another O atom is much easier to remove compared to that of the stoichiometric surfaces. These results suggest that the Au adsorption on Ce-vacancies not only creates an O-vacancy but also activates an O atom nearby. This provides a piece of direct evidence that Au adsorption on a Ce-vacancy may be responsible for some unique catalytic properties of Au/CeO2. (C) 2008 Elsevier B.V. All rights reserved.