Modelling multiple disulphide loop containing polypeptides by random conformation generation. The test cases of α-conotoxin GI and edothelin I

A general procedure for arriving at 3-D models of disulphiderich olypeptide systems based on the covalent cross-link constraints has been developed. The procedure, which has been coded as a computer program, RANMOD, assigns a large number of random, permitted backbone conformations to the polypeptide and identifies stereochemically acceptable structures as plausible models based on strainless disulphide bridge modelling. Disulphide bond modelling is performed using the procedure MODIP developed earlier, in connection with the choice of suitable sites where disulphide bonds could be engineered in proteins (Sowdhamini,R., Srinivasan,N., Shoichet,B., Santi,D.V., Ramakrishnan,C. and Balaram,P. (1989) Protein Engng, 3, 95-103). The method RANMOD has been tested on small disulphide loops and the structures compared against preferred backbone conformations derived from an analysis of putative disulphide subdatabase and model calculations. RANMOD has been applied to disulphiderich peptides and found to give rise to several stereochemically acceptable structures. The results obtained on the modelling of two test cases, a-conotoxin GI and endothelin I, are presented. Available NMR data suggest that such small systems exhibit conformational heterogeneity in solution. Hence, this approach for obtaining several distinct models is particularly attractive for the study of conformational excursions.

Adaptive Keeper Design for Dynamic Logic Circuits Using Rate Sensing Technique

The increasing variability in device leakage has made the design of keepers for wide OR structures a challenging task. The conventional feedback keepers (CONV) can no longer improve the performance of wide dynamic gates for the future technologies. In this paper, we propose an adaptive keeper technique called rate sensing keeper (RSK) that enables faster switching and tracks the variation across different process corners. It can switch upto 1.9x faster (for 20 legs) than CONV and can scale upto 32 legs as against 20 legs for CONV in a 130-nm 1.2-V process. The delay tracking is within 8% across the different process corners. We demonstrate the circuit operation of RSK using a 32 x 8 register file implemented in an industrial 130-nm 1.2-V CMOS process. The performance of individual dynamic logic gates are also evaluated on chip for various keeper techniques. We show that the RSK technique gives superior performance compared to the other alternatives such as Conditional Keeper (CKP) and current mirror-based keeper (LCR).

Experimental Test of the Quantum No-Hiding Theorem

The no-hiding theorem says that if any physical process leads to bleaching of quantum information from the original system, then it must reside in the rest of the Universe with no information being hidden in the correlation between these two subsystems. Here, we report an experimental test of the no-hiding theorem with the technique of nuclear magnetic resonance. We use the quantum state randomization of a qubit as one example of the bleaching process and show that the missing information can be fully recovered up to local unitary transformations in the ancilla qubits.

Particle filters for structural system identification using multiple test and sensor data: A combined computational and experimental study

The problem of structural system identification when measurements originate from multiple tests and multiple sensors is considered. An offline solution to this problem using bootstrap particle filtering is proposed. The central idea of the proposed method is the introduction of a dummy independent variable that allows for simultaneous assimilation of multiple measurements in a sequential manner. The method can treat linear/nonlinear structural models and allows for measurements on strains and displacements under static/dynamic loads. Illustrative examples consider measurement data from numerical models and also from laboratory experiments. The results from the proposed method are compared with those from a Kalman filter-based approach and the superior performance of the proposed method is demonstrated. Copyright (C) 2009 John Wiley & Sons, Ltd.

Generating synchronizable test sequences based on finite-statemachine with distributed ports

In the area of testing communication systems, the interfaces between systems to be tested and their testers have great impact on test generation and fault detectability. Several types of such interfaces have been standardized by the International Standardization Organization (ISO). A general distributed test architecture, containing distributed interfaces, has been presented in the literature for testing distributed systems based on the Open Distributing Processing (ODP) Basic Reference Model (BRM), which is a generalized version of ISO distributed test architecture. We study in this paper the issue of test selection with respect to such an test architecture. In particular, we consider communication systems that can be modeled by finite state machines with several distributed interfaces, called ports. A test generation method is developed for generating test sequences for such finite state machines, which is based on the idea of synchronizable test sequences. Starting from the initial effort by Sarikaya, a certain amount of work has been done for generating test sequences for finite state machines with respect to the ISO distributed test architecture, all based on the idea of modifying existing test generation methods to generate synchronizable test sequences. However, none studies the fault coverage provided by their methods. We investigate the issue of fault coverage and point out a fact that the methods given in the literature for the distributed test architecture cannot ensure the same fault coverage as the corresponding original testing methods. We also study the limitation of fault detectability in the distributed test architecture.

Use of L matrix to obtain reliable ab initio force constants of polyatomic molecules: ethylene as a test system

Direct use of experimental eigenvalues of the vibrational secular equation on to the ab initio predicted eigenvector space is suggested as a means of obtaining a reliable set of intramolecular force constants. This method which we have termed RECOVES (recovery in the eigenvector space) is computationally simple and free from arbitrariness. The RECOVES force constants, by definition, reproduce the experimental vibrational frequencies of the parent molecule exactly. The ab initio calculations were carried out for ethylene as a test molecule and the force constants obtained by the present procedure also correctly predict the vibrational frequencies of the deuterated species. The RECOVES force constants for ethylene are compared with those obtained by using the SQM procedure.

On generating optimal signal probabilities for random tests: A genetic approach

Genetic Algorithms are robust search and optimization techniques. A Genetic Algorithm based approach for determining the optimal input distributions for generating random test vectors is proposed in the paper. A cost function based on the COP testability measure for determining the efficacy of the input distributions is discussed, A brief overview of Genetic Algorithms (GAs) and the specific details of our implementation are described. Experimental results based on ISCAS-85 benchmark circuits are presented. The performance pf our GA-based approach is compared with previous results. While the GA generates more efficient input distributions than the previous methods which are based on gradient descent search, the overheads of the GA in computing the input distributions are larger. To account for the relatively quick convergence of the gradient descent methods, we analyze the landscape of the COP-based cost function. We prove that the cost function is unimodal in the search space. This feature makes the cost function amenable to optimization by gradient-descent techniques as compared to random search methods such as Genetic Algorithms.

Simplified seepage consolidation test for soft sediments

The consistency of very soft sediments prevents the conventional oedometer test from being applied to study their compressibility and permeability characteristics. The hydraulic consolidation test in existence requires sophisticated instrumentation and testing procedures. The present paper proposes a seepage-force-induced consolidation testing procedure for studying the compressibility and permeability behavior of soft sediments at low effective stress levels. The good agreement that has been observed between the results obtained from the proposed method and the conventional oedometer test at overlapping effective stress levels indicates that the proposed method can be used to study the compressibility and permeability characteristics of soft sediments at low effective stress levels satisfactorily.

Studies on the effects of test gas on the flow field around large angle blunt cone flying at hypersonic Mach number

The effect of the test gas on the flow field around a 120degrees apex angle blunt cone has been investigated in a shock tunnel at a nominal Mach number of 5.75. The shock standoff distance around the blunt cone was measured by an electrical discharge technique using both carbon dioxide and air as test gases. The forebody laminar convective heat transfer to the blunt cone was measured with platinum thin-film sensors in both air and carbon dioxide environments. An increase of 10 to 15% in the measured heat transfer values was observed with carbon dioxide as the test gas in comparison to air. The measured thickness of the shock layer along the stagnation streamline was 3.57 +/- 0.17 mm in air and 3.29 +/- 0.26 mm in carbon dioxide. The computed thickness of the shock layer for air and carbon dioxide were 3.98 mm and 3.02 mm, respectively. The observed increase in the measured heat transfer rates in carbon dioxide compared to air was due to the higher density ratio across the bow shock wave and the reduced shock layer thickness.

Circuits on cylinders

We consider the computational power of constant width polynomial size cylindrical circuits and non deterministic branching programs. We show that every function computed by a Pi(2) o MOD o AC(0) circuit can also be computed by a constant width polynomial size cylindrical nondeterministic branching program (or cylindrical circuit) and that every function computed by a constant width polynomial size cylindrical circuit belongs to ACC(0).

On synthesis of easily testable (k, K) circuits

A (k-, K) circuit is one which can be decomposed into nonintersecting blocks of gates where each block has no more than K external inputs, such that the graph formed by letting each block be a node and inserting edges between blocks if they share a signal line, is a partial k-tree. (k, K) circuits are special in that they have been shown to be testable in time polynomial in the number of gates in the circuit, and are useful if the constants k and K are small. We demonstrate a procedure to synthesise (k, K) circuits from a special class of Boolean expressions.

A low power, process invariant keeper design for high speed dynamic logic circuits

A low power keeper circuit using the concept of rate sensing has been proposed. The proposed technique reduces the amount of short circuit power dissipation in the domino gate by 70% compared to the conventional keeper technique. Also the total power-delay product is 26% lower compared to the previously reported techniques. The process tracking capability of the design enables the domino gate to achieve uniform delay across different process corners. This reduces the amount of short circuit power dissipation that occurs in the cascaded domino gates by 90%. The use of the proposed technique in the read path of a register file reduces the energy requirement by 26% as compared to the other keeper techniques. The proposed technique has been prototyped in 130nm CMOS technology.

A Systematic Approach to Synthesis of Verification Test-suites for Modular SoC Designs

Verification is one of the important stages in designing an SoC (system on chips) that consumes upto 70% of the design time. In this work, we present a methodology to automatically generate verification test-cases to verify a class of SoCs and also enable re-use of verification resources created from one SoC to another. A prototype implementation for generating the test-cases is also presented.