38 resultados para Steering-gear

em Chinese Academy of Sciences Institutional Repositories Grid Portal


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A previously suggested birefringence-customized modular optical interconnect technique is extended for lens-free relay operation. Various lens-free relay imaging models are developed. We claim that the lens-free relay system is important in simplifying an optical interconnect system whenever the imaging conditions permit. To verify the validity of various proposed concepts, we experimentally implemented some 8 x 8 optical permutation modules. High-power efficiency and low channel cross talk were experimentally observed. In general, the larger the channel spacing, the less the cross talk. A quantitative cross-talk measurement of the lens-free relay system shows that, for a fixed channel width of 0.5 mm and channel spacings of 0.5, 1, and 2 mm, a less than -20-dB cross-talk performance can be guaranteed for lens-free relay distances of 40, 280, and 430 mm, respectively. (C) 1998 Optical Society of America.

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This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a fourth-order phase domain single-stage Delta Sigma interpolator, and a 300-MS/s 12-bit current-steering DAC based on the Q(2) Random Walk switching scheme. The Delta Sigma interpolator is used to reduce the phase truncation error and the ROM size. The implemented fourth-order single-stage Delta Sigma noise shaper reduces the effective phase bits by four and reduces the ROM size by 16 times. The DDFS prototype is fabricated in a 0.35-mu m CMOS technology with active area of 1.11 mm(2) including a 12-bit DAC. The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm(2). The total power consumption of the DDFS is 200)mW with a 3.3-V power supply.

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This paper presents a 2GS/s 10-bit CMOS digital-to-analog converter (DAC). This DAC consists of a unit current-cell matrix for 6MSBs and another unit current-cell matrix for 4LSBs, trading off between the precision and size of the chip. The Current Mode Logic (CML) is used to ensure high speed, and a double Centro-symmetric current matrix is designed by the Q(2) random walk strategy in order to ensure the linearity of the DAC. The DAC occupies 2.2 x 2.2 mm2 of die area, and consumes 790mw at a single 3.3V power supply.

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This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a 4th-order single-stage pipelined delta-sigma interpolator and a 300MS/s 12-bit current-steering DAC based on Q(2) Random Walk switching scheme. The delta-sigma interpolator is used to reduce the phase truncation error and the ROM size. The measured spurious-free dynamic range (SFDR) is greater than 80 dB for 8-bit phase value and 12-bit sine-amplitude output. The DDFS prototype is fabricated in a 0.35um CMOS technology with core area of 1.11mm(2).

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This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a fourth-order phase domain single-stage Delta Sigma interpolator, and a 300-MS/s 12-bit current-steering DAC based on the Q(2) Random Walk switching scheme. The Delta Sigma interpolator is used to reduce the phase truncation error and the ROM size. The implemented fourth-order single-stage Delta Sigma noise shaper reduces the effective phase bits by four and reduces the ROM size by 16 times. The DDFS prototype is fabricated in a 0.35-mu m CMOS technology with active area of 1.11 mm(2) including a 12-bit DAC. The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm(2). The total power consumption of the DDFS is 200)mW with a 3.3-V power supply.

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The proposed DAC consists of a unit current-cell matrix for 8MSBs and a binary-weighted array for 4LSBs, trading-off between the precision, speed, and size of the chip. In order to ensure the linearity of the DAC, a double Centro symmetric current matrix is designed by the Q2 random walk strategy. To achieve better dynamic performance, a latch is added in front of the current switch to change the input signal, such as its optimal cross-point and voltage level. For a 12bit resolution,the converter reaches an update rate of 300MHz.

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目前加速速度范围在0.01c—0.3c的粒子的超导腔主要使用四分之一波长腔型。用于不同加速器上的频率范围在50—240MHz的四分之一波长腔在建造或者预研中。这种腔型的一个不足是其横向电磁成分会造成束流偏转效应,从而导致发射度的增长和束流的溢漏,在强流重离子加速器中这种效应尤为严重。对中国科学院近代物理研究所超导直线加速器中的频率为80.5和161MHz的四分之一波长腔的偏转效应进行了分析,计算结果表明,在四分之一腔体的设计时需要考虑到束流偏转的修正,这通常需要在漂移管端面上削适当大小的倾角来实现。

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基于组件的建模有时会产生高指标的微分代数方程(DAE),不能直接求解,需要进行指标约简。Gear方法是一个经典的指标约简方法,对Gear方法从理论上进行了说明和分析。对于一类具有特殊结构的DAE,提出了Gear方法实现中的优化策略,以降低指标约简后得到的方程规模。把优化后的实现与未优化的实现进行了比对,实验结果表明,优化过的实现方法针对这类特殊的问题确实达到了更好的约简效果。

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对于采用贴有压电陶瓷片作为作动元件的智能结构,在进行自适应控制时,往往要分析压电陶瓷片所引起的结构中的应力、应变和位移。对于带有压电陶瓷片梁的力学分析,文献中大多采用Euler-Bernoulli模型,即不考虑梁中的剪力,且假定梁沿厚度方向满足直法线假定。考虑到压电陶瓷片对梁的作用主要是通过粘贴层以剪力的形式传递到梁上,梁截面上的剪应力和剪应变一般很大,其影响不能忽略。本文采用Hellinger-Reissner二类变分广义余能原理,导出考虑梁截面上剪应力和剪应变影响的方程式,其中采用吉尔法求解非齐次常微分方程组。并将求得的解与相同条件的有限元解进行比较。结果证明该方法很有效。本文还对二类广义变分法进行了一般的讨论,发现,在使用二类广义变分法求解时,随着应力和位移所取项数的增加,结果有时反而变坏。并对二类广义变分法的使用提出了一些建议。

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We investigate the quantum superchemistry or Bose-enhanced atom-molecule conversions in a coherent output coupler of matter waves, as a simple generalization of the two-color photoassociation. The stimulated effects of molecular output step and atomic revivals are exhibited by steering the rf output couplings. The quantum noise-induced molecular damping occurs near a total conversion in a levitation trap. This suggests a feasible two-trap scheme to make a stable coherent molecular beam.

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通过MDT三维工具集方便地实现了直齿轮的造型,重点说明了用基于特征造型的方法在MDT环境下实现斜齿轮造型的详细过程,并用MDT的有限元分析功能对齿轮的受力善进行了分析。整个过程在MDT的集成环境下完成,对齿轮的工程设计具有较高的实用价值。

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The Yangtze finless porpoise (Neophocaena phocaenoides asiaeorientalis) is currently limited to the middle and lower reaches of the Yangtze River from Yichang to Shanghai, China, and the adjoining Poyang and Dongting Lakes. Its population size has decreased remarkably during the last several decades due to the heavy impact of human activities, including overfishing of prey species, water development projects that cause attendant habitat loss and degradation, water pollution, and accidental deaths caused by harmful fishing gear and collisions with motorized vessels. It was estimated that the number of remaining individuals was down to approximately 1800 in 2006, a number that is decreasing at a rate as high as 5% per year. Three conservation measures - in situ and ex situ conservation and captive breeding have been applied to the protection of this unique porpoise since the early 1990s. Seven natural and two "semi-natural" reserves have so far been established. Since 1996, a small group of finless porpoises has been successfully reared in a facility at the Institute of Hydrobiology of the Chinese Academy of Sciences; three babies were born in captivity on July 5, 2005, June 2, 2007 and July 5, 2008. These are the first freshwater cetaceans ever born in captivity in the world. Several groups of these porpoises caught in the main stream of the Yangtze River, or rescued, have been introduced into the Tian'e-Zhou Semi-natural Reserve since 1990. These efforts have proven that, not only can these animals survive in the area, they are also to reproduce naturally and successfully. More than 30 calves had been born in the reserve since then, with one to three born each year. Taking deaths and transfers into account, there were approximately 30 individuals living in the reserve as of the end of 2007. Among eight mature females captured in April 2008, five were confirmed pregnant. This effort represents the first successful attempt at off-site protection of a cetacean species in the world, and establishes a solid base for conservation of the Yangtze finless porpoise. A lesson must be drawn from the tragedy of Chinese River Dolphin (Lipotes vexillifer), which has already been declared likely extinct. Strong, effective and appropriate protective measures must be carried out quickly to prevent the Yangtze finless porpoise from becoming a second Chinese River Dolphin, and save the biodiversity of the Yangtze River as a whole.

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In this paper, combining low deposition rate with proper growth temperature, we have developed a way to prepare very low-density quantum dots (QDs) suited for the study of single OD properties without resorting to submicron lithography. Experiment results demonstrate that InAs desorption is significant during growing the low density QDs. Ripening of InAs QDs is clearly observed during the post-growth annealing. Photoluminescence spectroscopy reveals that the emission wavelength of low density InAs QDs arrives at 1332.4 nm with a GaAs capping layer.

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We report on the design and fabrication of a photonic crystal (PC) channel drop filter based on an asymmetric silicon-on-insulator (SOI) slab. The filter is composed of two symmetric stick-shape micro-cavities between two single-line-defect (W1) waveguides in a triangular lattice, and the phase matching condition for the filter to improve the drop efficiency is satisfied by modifying the positions and radii of the air holes around the micro-cavities. A sample is then fabricated by using electron beam lithography (EBL) and inductively coupled plasma (ICP) etching processes. The measured 0 factor of the filter is about 1140, and the drop efficiency is estimated to be 73% +/- 5% by fitting the transmission spectrum.