WANNIER-STARK LOCALIZATION IN INGAAS/GAAS SUPERLATTICES AND ITS APPLICATION TO ELECTROOPTICAL DEVICES

We have observed Wannier-Stark localization in strained In0.2Ga0.8As/GaAs superlattices by low- and room-temperature photocurrent spectra measurements. The experimental results are well in agreement with the theoretical predictions. A large field-induced modulation response of the absorption edge of the superlattices at room temperature suggests the possibilities of the application to the design of various kinds of electro-optical devices operating at a wavelength of 0.98 mum, based on Wannier-Stark localization effects.

A NEW RESULT IN TRANSIENT CURRENT EXPERIMENT ON A-SI-H P/I/N AND N/I/N DEVICES

The transient current response of a-Si:H in both p/i/n and n/i/n structures has been measured as a function of pulse intermittence and pulse amplitude. The results are consistent with the picture that in p/i/n samples the peculiar current response is caused by the competing contributions of electrons and holes which show themselves in different time scales.

THIN-FILM BIPBSRCACUO DIRECT-CURRENT SUPERCONDUCTING QUANTUM INTERFERING DEVICES OPERATING AT 78-K

Direct current SQUIDs (superconducting quantum interference devices) have been successfully fabricated by using a Pb-doped BiSrCaCuO superconducting thin film made by mixed evaporation of a single source composed of related components with a resistance heater. The dc SQUID comprises a square washer with a small hole. These SQUIDs show perfectly periodic voltage-flux characteristics without magnetic shield, that is, typically, the flux noise and energy resolution at a frequency range from dc to 1 Hz and at 78 K being 1.7 x 10(-3) PHI-0/ square-root Hz and 3.6 x 10(-26) J/Hz, respectively. Meanwhile, we have found out that one of the SQUIDs still was able to operate on flux-locked mode without bias currents and showed voltage-flux second harmonic characteristics. This phenomenon is not well understood, but it may be related to I-V (current-voltage) characteristics of the dc SQUID.

Characteristics of InAs epilayers for Hall effect devices grown on GaAs substrates by MBE

InAs thin films with good characteristics were grown on GaAs (0 0 1) substrates by molecular beam epitaxy. Cross-sectional transmission electron microscopy indicated that most of the threading dislocations formed by the interaction of misfit dislocations are annihilated above a small thickness. The high electron mobility and small temperature dependence of InAs epilayers are useful for magnetic sensors which is demonstrated by the properties of Hall effect devices.

针对一种多模式逻辑单元结构FPGA的工艺映射

结合FPGA设计的特点,提出一种可灵活配置的多模式FPGA逻辑单元结构及对其进行工艺映射的工具VMAP.该工具中除了采用一般的工艺映射算法外,还结合逻辑单元结构特点提出了专门的合并优化算法.该算法基于图的最大基数匹配,将部分查找表进行合并,减小了映射结果的面积开销.实验结果表明.对于标准的测试电路,结合文中的逻辑单元结构和合并算法得到的工艺映射结果平均可以减少15.7%的基本逻辑单元使用个数.

Influence of a tilted cavity on quantum-dot optoelectronic active devices

Quantum-dot laser diodes (QD-LDs) with a Fabry-Perot cavity and quantum-dot semiconductor optical amplifiers (QD-SOAs) with 7° tilted cavity were fabricated. The influence of a tilted cavity on optoelectronic active devices was also investigated. For the QD-LD, high performance was observed at room temperature. The threshold current was below 30 mA and the slope efficiency was 0.36 W/A. In contrast, the threshold current of the QD-SOA approached 1000 mA, which indicated that low facet reflectivity was obtained due to the tilted cavity design.A much more inverted carrier population was found in the QD-SOA active region at high operating current, thus offering a large optical gain and preserving the advantages of quantum dots in optical amplification and processing applications. Due to the inhomogeneity and excited state transition of quantum dots, the full width at half maximum of the electroluminescence spectrum of the QD-SOA was 81.6 nm at the injection current of 120 mA, which was ideal for broad bandwidth application in a wavelength division multiplexing system. In addition, there was more than one lasing peak in the lasing spectra of both devices and the separation of these peak positions was 6-8 nm,which is approximately equal to the homogeneous broadening of quantum dots.

Design for an IO block array in a tile-based FPGA

A design for an IO block array in a tile-based FPGA is presented.Corresponding with the characteristics of the FPGA, each IO cell is composed of a signal path, local routing pool and configurable input/output buffers.Shared programmable registers in the signal path can be configured for the function of JTAG, without specific boundary scan registers/latches, saving layout area.The local routing pool increases the flexibility of routing and the routability of the whole FPGA.An auxiliary power supply is adopted to increase the performance of the IO buffers at different configured IO standards.The organization of the IO block array is described in an architecture description file, from which the array layout can be accomplished through use of an automated layout assembly tool.This design strategy facilitates the design of FPGAs with different capacities or architectures in an FPGA family series.The bond-out schemes of the same FPGA chip in different packages are also considered.The layout is based on SMIC 0.13μm logic 1P8M salicide 1.2/2.5 V CMOS technology.Our performance is comparable with commercial SRAM-based FPGAs which use a similar process.

FPGA中专用可重构乘法器的设计

提出了一种新的嵌入在FPGA中可重构的流水线乘法器设计.该设计采用了改进的波茨编码算法,可以实现18×18有符号乘法或17×17无符号乘法.还提出了一种新的电路优化方法来减少部分积的数目,并且提出了一种新的乘法器版图布局,以便适应tilebased FPGA芯片设计所加的约束.该乘法器可以配置成同步或异步模式,也町以配置成带流水线的模式以满足高频操作.该设计很容易扩展成不同的输入和输出位宽.同时提出了一种新的超前进位加法器电路来产生最后的结果.采用了传输门逻辑来实现整个乘法器.乘法器采用了中芯国际0.13μm CMOS工艺来实现,完成18×18的乘法操作需要4.1ns.全部使用2级的流水线时,时钟周期可以达到2.5ns.这比商用乘法器快29.1%,比其他乘法器快17.5%.与传统的基于查找表的乘法器相比,该乘法器的面积为传统乘法器面积的1/32.

一种灵活的包含嵌入式存储器的FPGA结构

近年来,集成电路制造工艺的巨大提高使得FPGA有能力实现大的数字系统电路。这些大的系统通常需要大量的存储器以存储数据。很多FPGA生产商已经推出了含有大的嵌入式存储器的FPGA芯片。然而,大多数学术方面的CAD工具只针对于同质的FPGA结构(即只包括逻辑模块和布线通道的FPGA结构)。FPGA的布线结构通常被表示为RRG(布线资源图)。本文将介绍一种包含嵌入式存储器模块的FPGA的灵活结构以及一种建立RRG的方法。文中我们对VPR(versatile placing and routing)进行了改进,使得VPR可以处理包含嵌入式存储器结构的FPGA的布局布线问题,同时保持了VPR的灵活性。

平台式FPGA中可重构存储器模块的设计

可重构静态存储器(SRAM)模块是场可编程门阵列(FPGA)的重要组成部分,它必须尽量满足用户不同的需要,所以要有良好的可重构性能.本文设计了一款深亚微米工艺下的16-kb的高速,低功耗双端口可重构SRAM.它可以重构成16Kx1,8Kx2,4Kx4,2Kx8,1Kx16和512x32六种不同的工作模式.基于不同的配置选择,此SRAM可以配置为双端口SRAM,单端口SRAM,ROM,FIFO,大的查找表或移位寄存器,本文完整介绍了该SRAM的设计方法,重点介绍了一种新颖的存储单元电路结构:三端口存储单元,以及用于实现可重构功能的电路的设计方法.

An All-E-Beam Lithography Process for the Patterning of 2D Photonic Crystal Waveguide Devices

We present an all-e-beam lithography (EBL) process for the patterning of photonic crystal waveguides.The whole device structures are exposed in two steps. Holes constituting the photonic crystal lattice and defects are first exposed with a small exposure step size (less than 10nm). With the introduction of the additional proximity effect to compensate the original proximity effect, the shape, size, and position of the holes can be well controlled.The second step is the exposure of the access waveguides at a larger step size (about 30nm) to improve the scan speed of the EBL. The influence of write-field stitching error can be alleviated by replacing the original waveguides with tapered waveguides at the joint of adjacent write-fields. It is found experimentally that a higher exposure efficiency is achieved with a larger step size;however,a larger step size requires a higher dose.

A Radial Stub Test Circuit for Microwave Power Devices

With the principles of microwave circuits and semiconductor device physics, two microwave power device test circuits combined with a test fixture are designed and simulated, whose properties are evaluated by a parameter network analyzer within the frequency range from 3 to 8GHz. The simulation and experimental results verify that the test circuit with a radial stub is better than that without. As an example, a C-band AlGaN/GaN HEMT microwave power device is tested with the designed circuit and fixture. With a 5.4GHz microwave input signal, the maximum gain is 8.75dB, and the maximum output power is 33.2dBm.