164 resultados para Material de reforço
Resumo:
Introducing the growth interruption between the InAs deposition and subsequent GaAs growth in self-assembled quantum dot (QD) structures, the material transport process in the InAs layers has been investigated by photoluminescence and transmission electron microscopy measurement. InAs material in structures without misfit dislocations transfers from the wetting layer to QDs corresponding to the red-shift of PL peak energy due to interruption. On the other hand, the PL peak shifts to higher energy in the structures with dislocations. In this case, the misfit dislocations would capture the InAs material from the surrounding wetting layer and coherent islands leading to the reduction of the size of these QDs. The variations in the PL intensity and Linewidth are also discussed.
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An apparent defect suppression effect has been observed in InP through an investigation of deep level defects in different semi-insulating (SI) InP materials. Quality improvement of SI-InP based on the defect suppression mechanism is presented.
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A compact polarization-insensitive 8x8 arrayed waveguide grating with 100GHz channel spacing at 1.55 mu m is presented on the material of silicon on insulator (SOI). Increasing the epitaxial layer thickness can reduce the birefringence of the waveguide, but the wvaeguide's bend radius also increases at the same time. We choose the SOI wafer with 3.0 mu m epitaxial layer to reduce the device's size and designed the appropriate structure of rib wave-guides to eliminate the polarization dependant wavelength shift. Compared to the other methods of eliminating the polarization dependant wavelength shift, the method is convenient and easy to control the polarization without additional etching process. The index differences between TE0 and TM0 of straight and bend waveguides are 1.4x10(-5) and 3.9x10(-5), respectively. The results showed that the polarization dependant wavelength shift is 0.1nm, and the device size is 1.5x1.0 cm(2).
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A new material structure with Al0.22Ga0.78As/In0.15Ga0.85As/GaAs emitter spacer layer and GaAs/In0.15Ga0.85As/GaAs well for resonant tunneling diodes is designed and the corresponding device is fabricated. RTDs DC characteristics are measured at room temperature. Peak-to-valley current ratio (PVCR) is 7.44 for RTD Analysis on these results suggests that the material structure will be helpful to improve the quality, of RTD.
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A SOI thenno-optic variable optical attenuator with U-grooves based on a multimode interference coupler principle is fabricated. The dynamic attenuation range is 0 to 29 dB; at the wavelength range between 1510 nm and 1610nm, and the maximum power consumption is only l30mW. Compared to the variable optical attenuator without U-groove, the maximum power consumption decreases more than 230mW
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The optical storage characteristics of a new kind of organic photochromic material-pyrrylfulgide were experimentally investigated in the established parallel optical data storage system. Using the pyrrylfulgide/PMMA film as a photon-mode recording medium, micro-images and encoded binary digital data were recorded, readout and erased in this parallel system. The storage density currently reaches 3 x 10(7) bit/cm(2). The recorded information on the film can be kept for years in darkness at room temperature.
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The thermal stability of CoSi2 thin films on GaAs substrates has been studied using a variety of techniques. The CoSi2 thin films were formed by depositing Co(500 angstrom) and Si(1800 angstrom) layers on GaAs substrates by electron-beam evaporation followed by annealing processes, where the Si inter-layer was used as a diffusion/reaction barrier at the interface. The resistivity of CoSi2 thin films formed is about 30 muOMEGA cm. The Schottky barrier height of CoSi2/n-GaAs is 0.76 eV and the ideality factor is 1.14 after annealing at 750-degrees-C for 30 min. The CoSi2/GaAs interface is determined to be thermally stable and the thin film morphologically uniform on GaAs after 900-degrees-C/30 s anneal. The CoSi2 thin films fulfill the requirements in GaAs self-aligned gate technology.
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A comparatively low-quality silicon wafer (with a purity of almost-equal-to 99.9%) was adopted to form a silicon-on-defect-layer (SODL) structure featuring improved crystalline silicon near the defect layer (DL) by means of proton implantation and subsequent annealing. Thus, the SODL technique provides an opportunity to enable low-quality silicon wafers to be used for fabrication of low-cost solar cells.
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A new-type silicon material, silicon on defect layer (SODL) was proved to have a very high quality surface microstructure which is necessary for commercially feasible high-density very large scale integrated circuits (VLSI). The structure of the SODL material was viewed by transmission electron microscopy. The SODL material was also proved to have a buried defect layer with an insulating resistivity of 5.7 x 10(10) OMEGA-cm.
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GaAs epilayer films on Si substrates grown by molecular-beam epitaxy were investigated by the x-ray double-crystal diffraction method. The rocking curves were recorded for different diffraction vectors of samples. The results show that the unit-cell volumes of GaAs epilayers are smaller than that of the GaAs bulk material. The strained-layer superlattice buffer layer can improve the quality of the film, especially in the surface lamella. The parameter W' = W(expt)/(square-root \gamma-h\/gamma-0/sin 2-theta-B) is introduced to describe the quality of different depths of epilayers. As the x-ray incident angle is increased, W' also increases, that is, the quality of the film deteriorates with increasing penetration distance of the x-ray beam. Therefore, W' can be considered as a parameter that describes the degree of perfection of the epilayer along the depth below the surface. The cross-section transmission electron microscopy observations agree with the results of x-ray double-crystal diffraction.
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A high-resistivity defect layer buried beneath the silicon surface layer by using proton implantation and two-step conventional furnace annealing is described. During the first annealing step (600-degrees-C), implanted hydrogen atoms move towards the damage region and then coalesce into hydrogen gas bubbles at the residual defect layer. During the second annealing step (1180-degrees-C) these bubbles do not move due to their large volume. Structural defects are formed around the bubbles at a depth of approximately 0.5-mu-m. The defect layer results in a high resistivity value. Experiments show that the quality of the surface layer has been improved because the surface Hall mobility increased by 20%. The sample was investigated by transmission electron microscopy.