178 resultados para RECIRCULATING FREQUENCY SHIFTING
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Harmonic millimeter wave (mm-wave) generation and frequency up-conversion are experimentally demonstrated using optical injection locking and Brillouin selective sideband amplification (BSSA) induced by stimulated Brillouin scattering in a 10-km single-mode fiber. By using this method, we successfully generate third-harmonic mm-wave at 27 GHz (f(LO) - 9 GHz) with single sideband (SSB) modulation and up-convert the 2GHz intermediate frequency signal into the mm-wave band with single mode modulation of the SSB modes. In addition, the mm-wave carrier obtains more than 23 dB power gain due to the BSSA. The transmission experiments show that the generated mm-wave and up-converted signals indicate strong immunity against the chromatic dispersion of the fibers.
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It is shown that Li diffusion of GaAs can give rise to semi-insulating samples with electrical resistivity as high as 10(7) OMEGAcm in undoped, n-type, and p-type starting materials. The optical properties of the compensated samples are correlated with the depletion of free carriers caused by the Li diffusion. The radiative recombination of the Li-compensated samples is dominated by emissions with excitation-dependent peak positions that shift to lower energies with increasing compensation. The photoluminescence properties are characteristic of fluctuations of the electrostatic potential in strongly doped, compensated crystals.
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This paper presents a high speed ROM-less direct digital frequency synthesizer (DDFS) which has a phase resolution of 32 bits and a magnitude resolution of 10 bits. A 10-bit nonlinear segmented DAC is used in place of the ROM look-up table for phase-to-sine amplitude conversion and the linear DAC in a conventional DDFS.The design procedure for implementing the nonlinear DAC is presented. To ensure high speed, current mode logic (CML) is used. The chip is implemented in Chartered 0.35μm COMS technology with active area of 2.0 × 2.5 mm~2 and total power consumption of 400 mW at a single 3.3 V supply voltage. The maximum operating frequency is 850 MHz at room temperature and 1.0 GHz at 0 ℃.
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This paper proposes a fast-settling frequency-presetting PLL frequency synthesizer. A mixed-signal VCO and a digital processor are developed to accurately preset the frequency of VCO and greatly reduce the settling time. An auxiliary tuning loop is introduced in order to reduce reference spur caused by leakage current. The digital processor can automatically compensate presetting frequency variation with process and temperature, and control the operation of the auxiliary tuning loop. A 1.2 GHz integer-N synthesizer with 1 MHz reference input Was implemented in a 0.18μm process. The measured results demonstrate that the typical settling time of the synthesizer is less than 3μs,and the phase noise is -108 dBc/Hz@1MHz.The reference spur is -52 dBc.
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This paper presents a wide tuning range CMOS frequency synthesizer for a dual-band GPS receiver,which has been fabricated in a standard 0.18μm RF CMOS process. With a high Q on-chip inductor, the wide-band VCO shows a tuning range from 2 to 3.6GHz to cover 2.45 and 3.14GHz in case of process corner or temperature variation,with a current consumption varying accordingly from 0.8 to 0.4mA,from a 1.8V supply voltage. Measurement results show that the whole frequency synthesizer consumes very low power of 5.6mW working at L1 band with in-band phase noise less than - 82dBc/Hz and out-of-band phase noise about - ll2dBc/Hz at 1MHz offset from a 3. 142GHz carrier. The performance of the frequency synthesizer meets the requirements of GPS applications very well.
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A compact direct digital frequency synthesizer (DDFS) for system-on-chip implementation of the high precision rubidium atomic frequency standard is developed. For small chip size and low power consumption, the phase to sine mapping data is compressed using sine symmetry technique, sine-phase difference technique, quad line approximation technique,and quantization and error read only memory (QE-ROM) technique. The ROM size is reduced by 98% using these techniques. A compact DDFS chip with 32bit phase storage depth and a 10bit on-chip digital to analog converter has been successfully implemented using a standard 0.35μm CMOS process. The core area of the DDFS is 1.6mm^2. It consumes 167mW at 3.3V,and its spurious free dynamic range is 61dB.
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A novel edge-triggered D-flip-flop based on a resonant tunneling diode (RTD) is proposed and used to construct a binary frequency divider. The design is discussed in detail and the performance of the circuit is verified using SPICE. Relying on the nonlinear characteristics of RTD, we reduced the number of components used in our DFF circuit to only half of that required using conventional CMOS SCFL technology.
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A single longitudinal mode and narrow line width external cavity semiconductor laser is proposed. It is constructed with a semiconductor laser, collimator, a flame grating, and current and temperature control systems. The one facet of semiconductor laser is covered by high transmission film, and another is covered by high reflection film. The flame grating is used as light feedback element to select the mode of the semiconductor laser. The temperature of the constructed external cavity semiconductor laser is stabilized in order of 10(-3)degreesC by temperature control system. The experiments have been carried out and the results obtained-the spectral fine width of this laser is compressed to be less than 1.4MHz from its original line-width of more than 1200GHz and the output stability (including power and mode) is remarkably enhanced.
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Metal-semiconductor-metal (MSM) structures were fabricated by RF-plasma-assisted MBE using different buffer layer structures. One type of buffer structure consists of an AlN high-temperature buffer layer (HTBL) and a GaN intermediate temperature buffer layer (ITBL), another buffer structure consists of just a single A IN HTBL. Systematic measurements in the flicker noise and deep level transient Fourier spectroscopy (DLTFS) measurements were used to characterize the defect properties in the films. Both the noise and DLTFS measurements indicate improved properties for devices fabricated with the use of ITBL and is attributed to the relaxation of residue strain in the epitaxial layer during growth process. (C) 2003 Elsevier Ltd. All rights reserved.
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The problem of frequency limitation arising in calibration of the test fixtures is investigated in this paper. It is found that at some frequencies periodically, the accuracy of the methods becomes very low, and. the denominators of the expressions of the required S-parameters approach zero. This conclusion can be drawn whether-the test fixtures, are symmetric or not. A good agreement between theory and experiment is obtained.
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An electrical-to-green efficiency of more than 10% was demonstrated by intracavity-frequency-doubling a Q-switched diode-side-pumped Nd:YAG laser with a type II lithium triborate (LBO) crystal in a straight plano-concave cavity. An average power of 69.2 W at 532 nm was generated when electrical input power was 666 W. The corresponding electrical-to-green conversion efficiency is 10.4%. To the best of our knowledge, this is the highest electrical-to-green efficiency of second harmonic generation laser systems with side-pumped laser modules, ever reported. At about 66 W of green output power, the power fluctuation over 4 hours was better than +/-0.86%.
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