951 resultados para static random access memory


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Polycrystalline strontium titanate (SrTiO3) films were prepared by a pulsed laser deposition technique on p-type silicon and platinum-coated silicon substrates. The films exhibited good structural and dielectric properties which were sensitive to the processing conditions. The small signal dielectric constant and dissipation factor at a frequency of 100 kHz were about 225 and 0.03 respectively. The capacitance-voltage (C-V) characteristics in metal-insulator-semiconductor structures exhibited anomalous frequency dispersion behavior and a hysteresis effect. The hysteresis in the C-V curve was found to be about 1 V and of a charge injection type. The density of interface states was about 1.79 x 10(12) cm(-2). The charge storage density was found to be 40 fC mu m(-2) at an applied electric field of 200 kV cm(-1). Studies on current-voltage characteristics indicated an ohmic nature at lower voltages and space charge conduction at higher voltages. The films also exhibited excellent time-dependent dielectric breakdown behavior.

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Band alignment of resistive random access memory (RRAM) switching material Ta2O5 and different metal electrode materials was examined using high-resolution X-ray photoelectron spectroscopy. Schottky and hole barrier heights at the interface between electrode and Ta2O 5 were obtained, where the electrodes consist of materials with low to high work function (Φ m, v a c from 4.06 to 5.93 eV). Effective metal work functions were extracted to study the Fermi level pinning effect and to discuss the dominant conduction mechanism. An accurate band alignment between electrodes and Ta2O5 is obtained and can be used for RRAM electrode engineering and conduction mechanism study. © 2013 American Institute of Physics.

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Submitted by 阎军 (yanj@red.semi.ac.cn) on 2010-06-07T01:33:41Z No. of bitstreams: 1 ApplPhysLett_96_213505.pdf: 1153920 bytes, checksum: 69931d8deb797813dd478b5dd0e292c0 (MD5)

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This paper presents the vulnerabilities of single event effects (SEEs) simulated by heavy ions on ground and observed oil SJ-5 research satellite in space for static random access memories (SRAMs). A single event upset (SEU) prediction code has been used to estimate the proton-induced upset rates based oil the ground test curve of SEU cross-section versus heavy ion linear energy transfer (LET). The result agrees with that of the flight data.

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We report on the properties of BaBi2Ta2O9 (BBT) thin films for dynamic random-access memory (DRAM) and integrated capacitor applications. Crystalline BBT thin films were successfully fabricated by the chemical solution deposition technique on Pt-coated Si substrates at a low annealing temperature of 650°C. The films were characterized in terms of structural, dielectric, and insulating properties. The electrical measurements were conducted on Pt/BBT/Pt capacitors. The typical measured small signal dielectric constant and dissipation factor, at 100 kHz, were 282 and 0.023, respectively, for films annealed at 700°C for 60 min. The leakage current density of the films was lower than 10-9 A/cm2 at an applied electric field of 300 kV/cm. A large storage density of 38.4 fC/μm2 was obtained at an applied electric field of 200 kV/cm. The high dielectric constant, low dielectric loss and low leakage current density suggest the suitability of BBT thin films as dielectric layer for DRAM and integrated capacitor applications.

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As a novel implementation of the static random access memory (SRAM), the tunneling SRAM (TSRAM) uses the negative differential resistance of tunnel diodes (TD’s) and potentially offers considerable improvements in both standby power dissipation and integration density compared to the conventional CMOS SRAM. TSRAM has not yet been realized with a useful bit capacity mainly because the level of uniformity required of the nanoscale TD’s has been demanding and difficult to achieve. In this letter, we propose a Monte Carlo approach for estimating the yield of TSRAM cells and show that by optimizing the cell’s external circuit parameters, we can relax the allowable tolerance of a key device parameter of a resonant-TD-(RTD) based cell by three times.

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The impact of source/drain engineering on the performance of a six-transistor (6-T) static random access memory (SRAM) cell, based on 22 nm double-gate (DG) SOI MOSFETs, has been analyzed using mixed-mode simulation, for three different circuit topologies for low voltage operation. The trade-offs associated with the various conflicting requirements relating to read/write/standby operations have been evaluated comprehensively in terms of eight performance metrics, namely retention noise margin, static noise margin, static voltage/current noise margin, write-ability current, write trip voltage/current and leakage current. Optimal design parameters with gate-underlap architecture have been identified to enhance the overall SRAM performance, and the influence of parasitic source/drain resistance and supply voltage scaling has been investigated. A gate-underlap device designed with a spacer-to-straggle (s/sigma) ratio in the range 2-3 yields improved SRAM performance metrics, regardless of circuit topology. An optimal two word-line double-gate SOI 6-T SRAM cell design exhibits a high SNM similar to 162 mV, I-wr similar to 35 mu A and low I-leak similar to 70 pA at V-DD = 0.6 V, while maintaining SNM similar to 30% V-DD over the supply voltage (V-DD) range of 0.4-0.9 V.

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We report here an easily reversible set-reset process in a new Ge15Te83Si2 glass that could be a promising candidate for phase change random access memory applications. The I-V characteristics of the studied sample show a comparatively low threshold electric field (E-th) of 7.3 kV/cm. Distinct differences in the type of switching behavior are achieved by means of controlling the on state current. It enables the observation of a threshold type for less than 0.7 mA beyond memory type (set) switching. The set and reset processes have been achieved with a similar magnitude of 1 mA, and with a triangular current pulse for the set process and a short duration rectangular pulse of 10 msec width for the reset operation. Further, a self-resetting effect is seen in this material upon excitation with a saw-tooth/square pulse, and their response of leading and trailing edges are discussed. About 6.5 x 10(4) set-reset cycles have been undertaken without any damage to the device. (C) 2011 American Institute of Physics. doi: 10.1063/1.3574659]

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Lead-lanthanum-titanate (Pb0.72La0.28)TiO3 (PLT) is one of the interesting materials for DRAM applications due to its room temperature paraelectric nature and its higher dielectric permittivity. PLT thin films of different thickness ranging from 0.54- 0.9 mum were deposited on Pt coated Si substrates by excimer laser ablation technique. We have measured the voltage (field) dependence, the thickness dependence, temperature dependence of dc leakage currents and analysis is done on these PLT thin films. Current- voltage characteristics were measured at different temperatures for different thick films and the thickness dependence of leakage current has been explained by considering space charge limited conduction mechanism. The charge transport phenomena were studied in detail for films of different thicknesses for dynamic random access memory applications.

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Giant grained (42 mu m) translucent Ba5Li2Ti2Nb8O30 ceramic was fabricated by conventional sintering technique using the powders obtained via solid state reaction route. These samples were confirmed to possess tetragonal tungsten bronze structure (P4bm) at room temperature. The scanning electron microscopy established the average grain size to be close to 20 mu m. The photoluminescence studies carried out on these ceramics indicated sharp emission bands around 433 and 578 nm at an excitation wavelength of 350 nm which were attributed to band-edge emission as the band gap was 2.76 eV determined by Kubelka-Munk function. The dielectric properties of these ceramics were studied over wide frequency range (100-1 MHz) at room temperature. The decrease in dielectric constant with frequency could be explained on the basis of Koops theory. The dielectric constant and the loss were found to decrease with increasing frequency. The Curie temperature was confirmed to be similar to 370 A degrees C based on the dielectric anomaly observed when these measurements were carried out over a temperature range of 30-500 A degrees C. This shows a deviation from Curie-Weiss behaviour and hence an indicator of the occurrence of disordering in the system, the gamma = 1.23 which confirms the diffuse ferroelectric transition. These ceramics at room temperature exhibited P-E hysteresis loops, though not well saturated akin to that of their single crystalline counterparts. These are the suitable properties for ferroelectric random access memory applications.

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Circuit quantum electrodynamics, consisting of superconducting artificial atoms coupled to on-chip resonators, represents a prime candidate to implement the scalable quantum computing architecture because of the presence of good tunability and controllability. Furthermore, recent advances have pushed the technology towards the ultrastrong coupling regime of light-matter interaction, where the qubit-resonator coupling strength reaches a considerable fraction of the resonator frequency. Here, we propose a qubit-resonator system operating in that regime, as a quantum memory device and study the storage and retrieval of quantum information in and from the Z(2) parity-protected quantum memory, within experimentally feasible schemes. We are also convinced that our proposal might pave a way to realize a scalable quantum random-access memory due to its fast storage and readout performances.