918 resultados para pMOS transistors


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This paper presents the total dose radiation performance of 0. S^m SOI CMOS devices fabricated with full dose SIMOX technology. The radiation performance is characterized by threshold voltage shifts and leakage currents of transistors and standby currents of ASIC as functions of the total dose up to 500krad(Si) .The experimental results show that the worst case threshold voltage shifts of front channels are less than 320mV for pMOS transistors under off-gate radiation bias at lMrad(Si) and less than 120mV for nMOS transistors under on-gate radiation bias. No significant radiation-induced leakage current is observed in transistors to lMrad(Si). The standby currents of ASIC are less than the specification of 5μA over the total dose range of 500krad(Si).

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This paper proposes a novel differential mixer topology. The traditional stage of switching is replaced by a stack of NMOS and PMOS transistors combined. A design is given of a 900 MHz down-conversion mixer using a 0.35 μm CMOS process. Comparison with conventional mixer shows that the topology leads to a better performance in terms of conversion gain and linearity. ©2012 IEEE.

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Strained fin is one of the techniques used to improve the devices as their size keeps reducing in new nanoscale nodes. In this paper, we use a predictive technology of 14 nm where pMOS mobility is significantly improved when those devices are built on top of long, uncut fins, while nMOS devices present the opposite behavior due to the combination of strains. We explore the possibility of boosting circuit performance in repetitive structures where long uncut fins can be exploited to increase fin strain impact. In particular, pMOS pass-gates are used in 6T complementary SRAM cells (CSRAM) with reinforced pull-ups. Those cells are simulated under process variability and compared to the regular SRAM. We show that when layout dependent effects are considered the CSRAM design provides 10% to 40% faster access time while keeping the same area, power, and stability than a regular 6T SRAM cell. The conclusions also apply to 8T SRAM cells. The CSRAM cell also presents increased reliability in technologies whose nMOS devices have more mismatch than pMOS transistors.

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Silicon-on-insulating multi-layer (SOIM) materials were fabricated by co-implantation of oxygen and nitrogen ions with different energies and doses. The multilayer microstructure was investigated by cross-sectional transmission electron microscopy. P-channel metal-oxide-semiconductor (PMOS) transistors and metal-semiconductor-insulator-semiconductor (MSIS) capacitors were produced by these materials. After the irradiated total dose reaches 3 x 10(5) rad (Si), the threshold voltage of the SOIM-based PMOS transistor only shifts 0.07 V, while thin silicon-on-insulating buried-oxide SIMOX-based PMOS transistors have a shift of 1.2V, where SIMOX represents the separated by implanted oxygen. The difference of capacitance of the SOIM-based MSIS capacitors before and after irradiation is less than that of the thin-box SIMOX-based MSIS capacitor. The results suggest that the SOIM materials have a more remarkable irradiation tolerance of total dose effect, compared to the thin-buried-oxide SIMOX materials.

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Separation by implantation of oxygen and nitrogen (SIMON) silicon-on-insulator (SOI) materials were fabricated by sequential oxygen and nitrogen implantation with annealing after each implantation. Analyses of SIMS, XTEM and HRTEM were performed. The results show that superior buried insulating multi-layers were well formed and the possible mechanism is discussed. The remarkable total-dose irradiation tolerance of SIMON materials was confirmed by few shifts of drain leakage current-gate source voltage (I-V) curves of PMOS transistors fabricated on SIMON materials before and after irradiation.

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The patterning of photoactive purple membrane (PM) films onto electronic substrates to create a biologically based light detection device was investigated. This research is part of a larger collaborative effort to develop a miniaturized toxin detection platform. This platform will utilize PM films containing the photoactive protein bacteriorhodopsin to convert light energy to electrical energy. Following an effort to pattern PM films using focused ion beam machining, the photolithography based bacteriorhodopsin patterning technique (PBBPT) was developed. This technique utilizes conventional photolithography techniques to pattern oriented PM films onto flat substrates. After the basic patterning process was developed, studies were conducted that confirmed the photoelectric functionality of the PM films after patterning. Several process variables were studied and optimized in order to increase the pattern quality of the PM films. Optical microscopy, scanning electron microscopy, and interferometric microscopy were used to evaluate the PM films produced by the patterning technique. Patterned PM films with lateral dimensions of 15 μm have been demonstrated using this technique. Unlike other patterning techniques, the PBBPT uses standard photolithographic processes that make its integration with conventional semiconductor fabrication feasible. The final effort of this research involved integrating PM films patterned using the PBBPT with PMOS transistors. An indirect integration of PM films with PMOS transistors was successfully demonstrated. This indirect integration used the voltage produced by a patterned PM film under light exposure to modulate the gate of a PMOS transistor, activating the transistor. Following this success, a study investigating how this PM based light detection system responded to variations in light intensity supplied to the PM film. This work provides a successful proof of concept for a portion of the toxin detection platform currently under development.

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Field-effect transistors (FETs) fabricated from undoped and Co2+-doped CdSe colloidal nanowires show typical n-channel transistor behaviour with gate effect. Exposed to microscope light, a 10 times current enhancement is observed in the doped nanowire-based devices due to the significant modification of the electronic structure of CdSe nanowires induced by Co2+-doping, which is revealed by theoretical calculations from spin-polarized plane-wave density functional theory.

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Charge transport properties in organic semiconductors depend strongly on molecular order. Here we demonstrate field-effect transistors where drain current flows through a precisely defined array of nanostripes made of crystalline and highly ordered molecules. The molecular stripes are fabricated across the channel of the transistor by a stamp-assisted deposition of the molecular semiconductors from a solution. As the solvent evaporates, the capillary forces drive the solution to form menisci under the stamp protrusions. The solute precipitates only in the regions where the solution is confined by the menisci once the critical concentration is reached and self-organizes into molecularly ordered stripes 100-200 nm wide and a few monolayers high. The charge mobility measured along the stripes is 2 orders of magnitude larger than the values measured for spin-coated thin films.

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A series of four novel n-type molecules has been synthesized. Unlike previous approaches, the end group of these molecules was fixed and the molecular core was varied. The resulting materials were thoroughly analyzed. Electronic properties were derived from photoemission spectroscopy, optical properties were derived with the help of optical spectroscopy, and the structure of thin films on Au(111) was derived by scanning tunneling microscopy (STM). In addition, prototypical organic field-effect transistors (OFETs) (forming n-channels in OFETs) have been fabricated and tested. The correlation between the device performance of the respective OFETs (i.e., electron mobility) and their electronic as well as structural properties was investigated. It turned out that a combination of beneficial electronic and structural properties provides the best results. These findings are important for the design of new materials for future device applications.

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We report on charge transport and density of trap states (trap DOS) in ambipolar diketopyrrolopyrrole-benzothiadiazole copolymer thin-film transistors. This semiconductor possesses high electron and hole field-effect mobilities of up to 0.6 cm 2/V-s. Temperature and gate-bias dependent field-effect mobility measurements are employed to extract the activation energies and trap DOS to understand its unique high mobility balanced ambipolar charge transport properties. The symmetry between the electron and hole transport characteristics, parameters and activation energies is remarkable. We believe that our work is the first charge transport study of an ambipolar organic/polymer based field-effect transistor with room temperature mobility higher than 0.1 cm 2/V-s in both electrons and holes.

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In this letter, the performance characteristics of top-gate and dual-gate thin-film transistors (TFTs) with active semiconductor layers consisting of diketopyrrolopyrrole-naphthalene copolymer are described. Optimized top-gate TFTs possess mobilities of up to 1 cm 2 /V s with low contact resistance and reduced hysteresis in air. Dual-gate devices possess higher drive currents as well as improved subthreshold and above threshold characteristics compared to single-gate devices. We also describe the reasons that dual-gate devices result in improved performance. The good stability of this polymer combined with their promising electrical properties make this material a very promising semiconductor for printable electronics.

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In this letter, the velocity distributions of charge carriers in high-mobility polymer thin-film transistors (TFTs) with a diketopyrrolopyrrole- naphthalene copolymer (PDPP-TNT) semiconductor active layer are reported. The velocity distributions are found to be strongly dependent on measurement temperatures as well as annealing conditions. Considerable inhomogeneity is evident at low measurement temperatures and for low annealing temperatures. Such transient transport measurements can provide additional information about charge carrier transport in TFTs which are unavailable using steady-state transport measurements.

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We report charge-carrier velocity distributions in high-mobility polymer thin-film transistors (PTFTs) employing a dual-gate configuration. Our time-domain measurements of dual-gate PTFTs indicate higher effective mobility as well as fewer low-velocity carriers than in single-gate operation. Such nonquasi-static (NQS) measurements support and clarify the previously reported results of improved device performance in dual-gate devices by various groups. We believe that this letter demonstrates the utility of NQS measurements in studying charge-carrier transport in dual-gate thin-film transistors.

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In this paper, we report on the device physics and charge transport characteristics of high-mobility dual-gated polymer thin-film transistors with active semiconductor layers consisting of thiophene flanked DPP with thienylene-vinylene-thienylene (PDPP-TVT) alternating copolymers. Room temperature mobilities in these devices are high and can exceed 2 cm2 V-1 s-1. Steady-state and non-quasi-static measurements have been performed to extract key transport parameters and velocity distributions of charge carriers in this copolymer. Charge transport in this polymer semiconductor can be explained using a Multiple-Trap-and-Release or Monroe-type model. We also compare the activation energy vs. field-effect mobility in a few important polymer semiconductors to gain a better understanding of transport of DPP systems and make appropriate comparisons.

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We describe the advantages of dual-gate thin-film transistors (TFTs) for display applications. We show that in TFTs with active semiconductor layers composed of diketopyrrolopyrrole-naphthalene copolymer, the on-current is increased, the off-current is reduced, and the sub-threshold swing is improved compared to single-gate devices. Charge transport measurements in steady-state and under non-quasi-static conditions reveal the reasons for this improved performance. We show that in dual-gate devices, a much smaller fraction of charge carriers move in slow trap states. We also compare the activation energies for charge transport in the top-gate and bottom-gate configurations.