Junctionless Multiple-Gate Transistors for Analog Applications
Contribuinte(s) |
UNIVERSIDADE DE SÃO PAULO |
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Data(s) |
18/10/2012
18/10/2012
2011
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Resumo |
This paper presents the evaluation of the analog properties of nMOS junctionless (JL) multigate transistors, comparing their performance with those exhibited by inversion-mode (IM) trigate devices of similar dimensions. The study has been performed for devices operating in saturation as single-transistor amplifiers, and we have considered the dependence of the analog properties on fin width W(fin) and temperature T. Furthermore, this paper aims at providing a physical insight into the analog parameters of JL transistors. For that, in addition to device characterization, 3-D device simulations were performed. It is shown that, depending on gate voltage, JL devices can present both larger Early voltage V(EA) and larger intrinsic voltage gain A(V) than IM devices of similar dimensions. In addition, V(EA) and A(V) are always improved in JL devices when the temperature is increased, whereas they present a maximum value around room temperature for IM transistors. Science Foundation Ireland[05/IN/I888] Program for Research in Third-Level Institutions European Community (EC)[216171] European Community (EC)[216373] CAPES FAPESP CNPq |
Identificador |
IEEE TRANSACTIONS ON ELECTRON DEVICES, v.58, n.8, Special Issue, p.2511-2519, 2011 0018-9383 http://producao.usp.br/handle/BDPI/18817 10.1109/TED.2011.2157826 |
Idioma(s) |
eng |
Publicador |
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
Relação |
Ieee Transactions on Electron Devices |
Direitos |
restrictedAccess Copyright IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
Palavras-Chave | #Analog operation #junctionless (JL) transistor #multiple gate transistor #silicon on insulator #ENHANCED PERFORMANCE #ACCUMULATION-MODE #CHANNEL MOSFETS #SOI MOSFETS #FINFETS #CIRCUITS #WIRE #Engineering, Electrical & Electronic #Physics, Applied |
Tipo |
article original article publishedVersion |