Heteroepitaxial growth of novel SOI material Si/gamma-Al2O3/Si

In this paper, we report the fabrication of Si-based double hetero-epitaxial SOI materials Si/gamma-Al2O3/Si. First, single crystalline gamma-Al2O3 (100) insulator films were grown epitaxially on Si(100) by LPCVD, and then, Si(100) epitaxial films were grown on gamma-Al2O3 (100)/Si(100) epi-substrates using a CVD method similar to silicon on sapphire (SOS) epitaxial growth. The Si/gamma-Al2O3 (100)/Si(100) SOI materials are characterized in detail by RHEED, XRD and AES techniques. The results demonstrate that the device-quality novel SOI materials Si/gamma-Al2O3 (100)/Si(100) has been fabricated successfully and can be used for application of MOS device.

Heteroepitaxial growth and annealing of gamma-Al2O3 thin films on silicon

The gamma-Al2O3 films were grown on Si (100) substrates using the sources of TMA (Al (CH3)(3)) and O-2 by very low-pressure chemical vapor deposition (VLP-CVD). It has been found that the gamma-Al2O3 film has a mirror-like surface and the RMS was about 2.5nm. And the orientation relationship was gamma-Al2O3(100)/Si(100). The thickness uniformity of gamma-Al2O3 films for 2-inch epi-wafer was less than 5%. The X-ray diffraction (XRD) and reflection high-energy electron diffraction (RHEED) results show that the crystalline quality of the film was improved after the film was annealed at 1000degreesC in O-2 atmosphere. The high-frequency C-V and leakage current of Al/gamma-Al2O3/Si capacitor were also measured to verify the annealing effect of the film. The results show that the dielectric constant increased from 4 to 7 and the breakdown voltage for 65-nm-thick gamma-Al2O3 film on silicon increases from 17V to 53V.

Heteroepitaxial Growth of 3C-SiC on Si (111) Substrate using AlN as a Buffer Layer

Using AlN as a buffer layer, 3C-SiC film has been grown on Si substrate by low pressure chemical vapor deposition (LPCVD). Firstly growth of AlN thin films on Si substrates under varied V/III ratios at 1100 degrees was investigated and the (002) preferred orientational growth with good crystallinity was obtained at the V/III ratio of 10000. Annealing at 1300 degrees C indicated the surface morphology and crystallinity stability of AlN film. Secondly the 3C-SiC film was grown on Si substrate with AlN buffer layer. Compared to that without AlN buffer layer, the crystal quality of the 3C-SiC film was improved on the AlN/Si substrate, characterized by X-ray diffraction (XRD) and Raman measurements.

Multi-wafer 3C-SiC heteroepitaxial growth on Si(100) substrates

Epitaxial growth of semiconductor films in multiple-wafer mode is under vigorous development in order to improve yield output to meet the industry increasing demands. Here we report on results of the heteroepitaxial growth of multi-wafer 3C-SiC films on Si(100) substrates by employing a home-made horizontal hot wall low pressure chemical vapour deposition (HWLPCVD) system which was designed to be have a high-throughput, multi-wafer (3x2-inch) capacity. 3C-SiC film properties of the intra-wafer and the wafer-to-wafer including crystalline morphologies, structures and electronics are characterized systematically. The undoped and the moderate NH3 doped n-type 3C-SiC films with specular surface are grown in the HWLPCVD, thereafter uniformities of intra-wafer thickness and sheet resistance of the 3C-SiC films are obtained to be 6%similar to 7% and 6.7%similar to 8%, respectively, and within a run, the deviations of wafer-to-wafer thickness and sheet resistance are less than 1% and 0.8%, respectively.

Heteroepitaxial Growth of 3C-SiC Films on Maskless Patterned Silicon Substrates

Heteroepitaxial growth of 3C-SiC on patterned Si substrates by low pressure chemical vapor deposition (LPCVD) has been investigated to improve the crystal quality of 3C-SiC films. Si substrates were patterned with parallel lines, 1 to 10μm wide and spaced 1 to 10μm apart, which was carried out by photolithography and reactive ion etching. Growth behavior on the patterned substrates was systematically studied by scanning electron microscopy (SEM). An air gap structure and a spherical shape were formed on the patterned Si substrates with different dimensions. The air gap formed after coalescence reduced the stress in the 3C-SiC films, solving the wafer warp and making it possible to grow thicker films. XRD patterns indicated that the films grown on the maskless patterned Si substrates were mainly composed of crystal planes with (111) orientation.

Heteroepitaxial Growth and Heterojunction Characteristics of Voids-Free n-3C-SiC on p-Si(100)

Highly oriented voids-free 3C-SiC heteroepitaxial layers are grown on φ50mm Si (100) substrates by low pressure chemical vapor deposition (LPCVD). The initial stage of carbonization and the surface morphology of carbonization layers of Si(100) are studied using reflection high energy electron diffraction (RHEED) and scanning electron microscopy (SEM). It is shown that the optimized carbonization temperature for the growth of voids-free 3S-SiC on Si (100) substrates is 1100 ℃. The electrical properties of SiC layers are characterized using Van der Pauw method. The I-V, C-V, and the temperature dependence of I-V characteristics in n-3C-SiC-p-Si heterojunctions with AuGeNi and Al electrical pads are investigated. It is shown that the maximum reverse breakdown voltage of the n-3C-SiC-p-Si heterojunction diodes reaches to 220V at room temperature. These results indicate that the SiC/Si heterojunction diode can be used to fabricate the wide bandgap emitter SiC/Si heterojunction bipolar transistors (HBT's).

Heteroepitaxial growth of novel SOI material Si/gamma-Al2O3/Si

In this paper, we report the fabrication of Si-based double hetero-epitaxial SOI materials Si/gamma-Al2O3/Si. First, single crystalline gamma-Al2O3 (100) insulator films were grown epitaxially on Si(100) by LPCVD, and then, Si(100) epitaxial films were grown on gamma-Al2O3 (100)/Si(100) epi-substrates using a CVD method similar to silicon on sapphire (SOS) epitaxial growth. The Si/gamma-Al2O3 (100)/Si(100) SOI materials are characterized in detail by RHEED, XRD and AES techniques. The results demonstrate that the device-quality novel SOI materials Si/gamma-Al2O3 (100)/Si(100) has been fabricated successfully and can be used for application of MOS device.

Heteroepitaxial growth and annealing of gamma-Al2O3 thin films on silicon

The gamma-Al2O3 films were grown on Si (100) substrates using the sources of TMA (Al (CH3)(3)) and O-2 by very low-pressure chemical vapor deposition (VLP-CVD). It has been found that the gamma-Al2O3 film has a mirror-like surface and the RMS was about 2.5nm. And the orientation relationship was gamma-Al2O3(100)/Si(100). The thickness uniformity of gamma-Al2O3 films for 2-inch epi-wafer was less than 5%. The X-ray diffraction (XRD) and reflection high-energy electron diffraction (RHEED) results show that the crystalline quality of the film was improved after the film was annealed at 1000degreesC in O-2 atmosphere. The high-frequency C-V and leakage current of Al/gamma-Al2O3/Si capacitor were also measured to verify the annealing effect of the film. The results show that the dielectric constant increased from 4 to 7 and the breakdown voltage for 65-nm-thick gamma-Al2O3 film on silicon increases from 17V to 53V.

Nonpolar growth and characterization of InN overlayers on vertically oriented GaN nanorods

Nanostructured hexagonal InN overlayers were heteroepitaxially deposited on vertically oriented c-axis GaN nanorods by metal-organic chemical vapor deposition. InN overlayers grown in radial directions are featured by a nonpolar heteroepitaxial growth mode on GaN nanorods, showing a great difference from the conventional InN growth on (0001) c-plane GaN template. The surface of InN overlayers is mainly composed of several specific facets with lower crystallographic indices. The orientation relationship between InN and GaN lattices is found to be [0001](InN) parallel to [0001](GaN) and [1100](InN)parallel to[1100](GaN). A strong photoluminescence of InN nanostructures is observed. (C) 2009 American Institute of Physics. [DOI 10.1063/1.3177347]

The growth of SiC on Si substrates with C2H4 and Si2H6

SiC was grown on Si (100) substrates oriented and off-oriented by 2-5 degrees towards [011] with simultaneous supply of C2H4 and S2H6 at 1050 degrees C. SiC formed during removal of oxide could be removed at 1150 degrees C. Twinned growth occurred on both oriented and off-oriented substrates during carbonization, but fewer twins formed on the off-oriented substrate than that on the oriented substrate. In SiC growth process, twinned growth continued on the off-oriented substrate whereas twinned growth stopped and single crystal SiC with double-domain (2 x 1) superstructure formed on the oriented substrate. SiC single crystal could grow on a carbonized twinned buffer layer. Obvious SiC LO and TO phonon modes were observed with Raman spectroscopy in the epilayer grown on the oriented substrate. The surface of the epilayer grown on the oriented substrate was smooth, while there was a high density of islands on the epilayer grown on the off-oriented substrate. The film grown on the oriented substrate is superior than that grown on the off-oriented substrate. (C) 1999 Elsevier Science B.V. All rights reserved.

The effects of carbonized buffer layer on the growth of SiC on Si

Carbonized buffer layers were formed with C2H4 on Si(100) and Si(111) substrates using different methods and SIC epilayers were grown on each buffer layer at 1050 degrees C with simultaneous supply of C2H4 and Si2H6. The structure of carbonized and epitaxy layers was analyzed with in situ RHEED. The buffer layers formed at 800 degrees C were polycrystalline on both Si(100) and Si(111) substrates whereas they were single crystals, with twins on Si(100) and without tu ins on Si(111)substrates. when formed with a gradual rise in substrate temperature from 300 degrees C to growth temperature. Raising the substrate temperature slowly results in the formation of more twins. Epilayers grown on carbonized polycrystalline lavers are polycrystalline. Single crystal epilayers without twins grow on single crystalline buffer layers without twins or with a few twins. (C) 1999 Elsevier Science B.V. All rights reserved.

GROWTH OF HIGH-QUALITY GALLIUM-ARSENIDE ON HF-ETCHED SILICON (001) BY CHEMICAL BEAM EPITAXY

HF etching followed by relatively low temperature (almost-equal-to 600-degrees-C) pretreatment is shown to provide a suitable substrate for the heteroepitaxial growth of GaAs on Si(100) by CBE using TEGa and AsH3 as sources. Rutherford backscattering (RBS), photoluminescence (PL), transmission electron microscopy (TEM), and Raman measurements show the low-defect nature of the GaAs epilayer.

The effects of carbonized buffer layer on the growth of SiC on Si

Carbonized buffer layers were formed with C2H4 on Si(100) and Si(111) substrates using different methods and SIC epilayers were grown on each buffer layer at 1050 degrees C with simultaneous supply of C2H4 and Si2H6. The structure of carbonized and epitaxy layers was analyzed with in situ RHEED. The buffer layers formed at 800 degrees C were polycrystalline on both Si(100) and Si(111) substrates whereas they were single crystals, with twins on Si(100) and without tu ins on Si(111)substrates. when formed with a gradual rise in substrate temperature from 300 degrees C to growth temperature. Raising the substrate temperature slowly results in the formation of more twins. Epilayers grown on carbonized polycrystalline lavers are polycrystalline. Single crystal epilayers without twins grow on single crystalline buffer layers without twins or with a few twins. (C) 1999 Elsevier Science B.V. All rights reserved.

MOVPE growth of III-V semiconductors on silicon for third generation solar cells

Esta Tesis trata sobre el desarrollo y crecimiento -mediante tecnología MOVPE (del inglés: MetalOrganic Vapor Phase Epitaxy)- de células solares híbridas de semiconductores III-V sobre substratos de silicio. Esta integración pretende ofrecer una alternativa a las células actuales de III-V, que, si bien ostentan el récord de eficiencia en dispositivos fotovoltaicos, su coste es, a día de hoy, demasiado elevado para ser económicamente competitivo frente a las células convencionales de silicio. De este modo, este proyecto trata de conjugar el potencial de alta eficiencia ya demostrado por los semiconductores III-V en arquitecturas de células fotovoltaicas multiunión con el bajo coste, la disponibilidad y la abundancia del silicio. La integración de semiconductores III-V sobre substratos de silicio puede afrontarse a través de diferentes aproximaciones. En esta Tesis se ha optado por el desarrollo de células solares metamórficas de doble unión de GaAsP/Si. Mediante esta técnica, la transición entre los parámetros de red de ambos materiales se consigue por medio de la formación de defectos cristalográficos (mayoritariamente dislocaciones). La idea es confinar estos defectos durante el crecimiento de sucesivas capas graduales en composición para que la superficie final tenga, por un lado, una buena calidad estructural, y por otro, un parámetro de red adecuado. Numerosos grupos de investigación han dirigido sus esfuerzos en los últimos años en desarrollar una estructura similar a la que aquí proponemos. La mayoría de éstos se han centrado en entender los retos asociados al crecimiento de materiales III-V, con el fin de conseguir un material de alta calidad cristalográfica. Sin embargo, prácticamente ninguno de estos grupos ha prestado especial atención al desarrollo y optimización de la célula inferior de silicio, cuyo papel va a ser de gran relevancia en el funcionamiento de la célula completa. De esta forma, y con el fin de completar el trabajo hecho hasta el momento en el desarrollo de células de III-V sobre silicio, la presente Tesis se centra, fundamentalmente, en el diseño y optimización de la célula inferior de silicio, para extraer su máximo potencial. Este trabajo se ha estructurado en seis capítulos, ordenados de acuerdo al desarrollo natural de la célula inferior. Tras un capítulo de introducción al crecimiento de semiconductores III-V sobre Si, en el que se describen las diferentes alternativas para su integración; nos ocupamos de la parte experimental, comenzando con una extensa descripción y caracterización de los substratos de silicio. De este modo, en el Capítulo 2 se analizan con exhaustividad los diferentes tratamientos (tanto químicos como térmicos) que deben seguir éstos para garantizar una superficie óptima sobre la que crecer epitaxialmente el resto de la estructura. Ya centrados en el diseño de la célula inferior, el Capítulo 3 aborda la formación de la unión p-n. En primer lugar se analiza qué configuración de emisor (en términos de dopaje y espesor) es la más adecuada para sacar el máximo rendimiento de la célula inferior. En este primer estudio se compara entre las diferentes alternativas existentes para la creación del emisor, evaluando las ventajas e inconvenientes que cada aproximación ofrece frente al resto. Tras ello, se presenta un modelo teórico capaz de simular el proceso de difusión de fosforo en silicio en un entorno MOVPE por medio del software Silvaco. Mediante este modelo teórico podemos determinar qué condiciones experimentales son necesarias para conseguir un emisor con el diseño seleccionado. Finalmente, estos modelos serán validados y constatados experimentalmente mediante la caracterización por técnicas analíticas (i.e. ECV o SIMS) de uniones p-n con emisores difundidos. Uno de los principales problemas asociados a la formación del emisor por difusión de fósforo, es la degradación superficial del substrato como consecuencia de su exposición a grandes concentraciones de fosfina (fuente de fósforo). En efecto, la rugosidad del silicio debe ser minuciosamente controlada, puesto que éste servirá de base para el posterior crecimiento epitaxial y por tanto debe presentar una superficie prístina para evitar una degradación morfológica y cristalográfica de las capas superiores. En este sentido, el Capítulo 4 incluye un análisis exhaustivo sobre la degradación morfológica de los substratos de silicio durante la formación del emisor. Además, se proponen diferentes alternativas para la recuperación de la superficie con el fin de conseguir rugosidades sub-nanométricas, que no comprometan la calidad del crecimiento epitaxial. Finalmente, a través de desarrollos teóricos, se establecerá una correlación entre la degradación morfológica (observada experimentalmente) con el perfil de difusión del fósforo en el silicio y por tanto, con las características del emisor. Una vez concluida la formación de la unión p-n propiamente dicha, se abordan los problemas relacionados con el crecimiento de la capa de nucleación de GaP. Por un lado, esta capa será la encargada de pasivar la subcélula de silicio, por lo que su crecimiento debe ser regular y homogéneo para que la superficie de silicio quede totalmente pasivada, de tal forma que la velocidad de recombinación superficial en la interfaz GaP/Si sea mínima. Por otro lado, su crecimiento debe ser tal que minimice la aparición de los defectos típicos de una heteroepitaxia de una capa polar sobre un substrato no polar -denominados dominios de antifase-. En el Capítulo 5 se exploran diferentes rutinas de nucleación, dentro del gran abanico de posibilidades existentes, para conseguir una capa de GaP con una buena calidad morfológica y estructural, que será analizada mediante diversas técnicas de caracterización microscópicas. La última parte de esta Tesis está dedicada al estudio de las propiedades fotovoltaicas de la célula inferior. En ella se analiza la evolución de los tiempos de vida de portadores minoritarios de la base durante dos etapas claves en el desarrollo de la estructura Ill-V/Si: la formación de la célula inferior y el crecimiento de las capas III-V. Este estudio se ha llevado a cabo en colaboración con la Universidad de Ohio, que cuentan con una gran experiencia en el crecimiento de materiales III-V sobre silicio. Esta tesis concluye destacando las conclusiones globales del trabajo realizado y proponiendo diversas líneas de trabajo a emprender en el futuro. ABSTRACT This thesis pursues the development and growth of hybrid solar cells -through Metal Organic Vapor Phase Epitaxy (MOVPE)- formed by III-V semiconductors on silicon substrates. This integration aims to provide an alternative to current III-V cells, which, despite hold the efficiency record for photovoltaic devices, their cost is, today, too high to be economically competitive to conventional silicon cells. Accordingly, the target of this project is to link the already demonstrated efficiency potential of III-V semiconductor multijunction solar cell architectures with the low cost and unconstrained availability of silicon substrates. Within the existing alternatives for the integration of III-V semiconductors on silicon substrates, this thesis is based on the metamorphic approach for the development of GaAsP/Si dual-junction solar cells. In this approach, the accommodation of the lattice mismatch is handle through the appearance of crystallographic defects (namely dislocations), which will be confined through the incorporation of a graded buffer layer. The resulting surface will have, on the one hand a good structural quality; and on the other hand the desired lattice parameter. Different research groups have been working in the last years in a structure similar to the one here described, being most of their efforts directed towards the optimization of the heteroepitaxial growth of III-V compounds on Si, with the primary goal of minimizing the appearance of crystal defects. However, none of these groups has paid much attention to the development and optimization of the bottom silicon cell, which, indeed, will play an important role on the overall solar cell performance. In this respect, the idea of this thesis is to complete the work done so far in this field by focusing on the design and optimization of the bottom silicon cell, to harness its efficiency. This work is divided into six chapters, organized according to the natural progress of the bottom cell development. After a brief introduction to the growth of III-V semiconductors on Si substrates, pointing out the different alternatives for their integration; we move to the experimental part, which is initiated by an extensive description and characterization of silicon substrates -the base of the III-V structure-. In this chapter, a comprehensive analysis of the different treatments (chemical and thermal) required for preparing silicon surfaces for subsequent epitaxial growth is presented. Next step on the development of the bottom cell is the formation of the p-n junction itself, which is faced in Chapter 3. Firstly, the optimization of the emitter configuration (in terms of doping and thickness) is handling by analytic models. This study includes a comparison between the different alternatives for the emitter formation, evaluating the advantages and disadvantages of each approach. After the theoretical design of the emitter, it is defined (through the modeling of the P-in-Si diffusion process) a practical parameter space for the experimental implementation of this emitter configuration. The characterization of these emitters through different analytical tools (i.e. ECV or SIMS) will validate and provide experimental support for the theoretical models. A side effect of the formation of the emitter by P diffusion is the roughening of the Si surface. Accordingly, once the p-n junction is formed, it is necessary to ensure that the Si surface is smooth enough and clean for subsequent phases. Indeed, the roughness of the Si must be carefully controlled since it will be the basis for the epitaxial growth. Accordingly, after quantifying (experimentally and by theoretical models) the impact of the phosphorus on the silicon surface morphology, different alternatives for the recovery of the surface are proposed in order to achieve a sub-nanometer roughness which does not endanger the quality of the incoming III-V layers. Moving a step further in the development of the Ill-V/Si structure implies to address the challenges associated to the GaP on Si nucleation. On the one hand, this layer will provide surface passivation to the emitter. In this sense, the growth of the III-V layer must be homogeneous and continuous so the Si emitter gets fully passivated, providing a minimal surface recombination velocity at the interface. On the other hand, the growth should be such that the appearance of typical defects related to the growth of a polar layer on a non-polar substrate is minimized. Chapter 5 includes an exhaustive study of the GaP on Si nucleation process, exploring different nucleation routines for achieving a high morphological and structural quality, which will be characterized by means of different microscopy techniques. Finally, an extensive study of the photovoltaic properties of the bottom cell and its evolution during key phases in the fabrication of a MOCVD-grown III-V-on-Si epitaxial structure (i.e. the formation of the bottom cell; and the growth of III-V layers) will be presented in the last part of this thesis. This study was conducted in collaboration with The Ohio State University, who has extensive experience in the growth of III-V materials on silicon. This thesis concludes by highlighting the overall conclusions of the presented work and proposing different lines of work to be undertaken in the future.

Direct measurement of coherency limits for strain relaxation in heteroepitaxial core/shell nanowires

The growth of heteroepitaxially strained semiconductors at the nanoscale enables tailoring of material properties for enhanced device performance. For core/shell nanowires (NWs), theoretical predictions of the coherency limits and the implications they carry remain uncertain without proper identification of the mechanisms by which strains relax. We present here for the Ge/Si core/shell NW system the first experimental measurement of critical shell thickness for strain relaxation in a semiconductor NW heterostructure and the identification of the relaxation mechanisms. Axial and tangential strain relief is initiated by the formation of periodic a/2 〈110〉 perfect dislocations via nucleation and glide on {111} slip-planes. Glide of dislocation segments is directly confirmed by real-time in situ transmission electron microscope observations and by dislocation dynamics simulations. Further shell growth leads to roughening and grain formation which provides additional strain relief. As a consequence of core/shell strain sharing in NWs, a 16 nm radius Ge NW with a 3 nm Si shell is shown to accommodate 3% coherent strain at equilibrium, a factor of 3 increase over the 1 nm equilibrium critical thickness for planar Si/Ge heteroepitaxial growth. © 2012 American Chemical Society.