A III-V channel field effect transistor for non-classical CMOS: process optimisation for improved gate stack function

This thesis describes a collection of studies into the electrical response of a III-V MOS stack comprising metal/GaGdO/GaAs layers as a function of fabrication process variables and the findings of those studies. As a result of this work, areas of improvement in the gate process module of a III-V heterostructure MOSFET were identified. Compared to traditional bulk silicon MOSFET design, one featuring a III-V channel heterostructure with a high-dielectric-constant oxide as the gate insulator provides numerous benefits, for example: the insulator can be made thicker for the same capacitance, the operating voltage can be made lower for the same current output, and improved output characteristics can be achieved without reducing the channel length further. It is known that transistors composed of III-V materials are most susceptible to damage induced by radiation and plasma processing. These devices utilise sub-10 nm gate dielectric films, which are prone to contamination, degradation and damage. Therefore, throughout the course of this work, process damage and contamination issues, as well as various techniques to mitigate or prevent those have been investigated through comparative studies of III-V MOS capacitors and transistors comprising various forms of metal gates, various thicknesses of GaGdO dielectric, and a number of GaAs-based semiconductor layer structures. Transistors which were fabricated before this work commenced, showed problems with threshold voltage control. Specifically, MOSFETs designed for normally-off (VTH > 0) operation exhibited below-zero threshold voltages. With the results obtained during this work, it was possible to gain an understanding of why the transistor threshold voltage shifts as the gate length decreases and of what pulls the threshold voltage downwards preventing normally-off device operation. Two main culprits for the negative VTH shift were found. The first was radiation damage induced by the gate metal deposition process, which can be prevented by slowing down the deposition rate. The second was the layer of gold added on top of platinum in the gate metal stack which reduces the effective work function of the whole gate due to its electronegativity properties. Since the device was designed for a platinum-only gate, this could explain the below zero VTH. This could be prevented either by using a platinum-only gate, or by matching the layer structure design and the actual gate metal used for the future devices. Post-metallisation thermal anneal was shown to mitigate both these effects. However, if post-metallisation annealing is used, care should be taken to ensure it is performed before the ohmic contacts are formed as the thermal treatment was shown to degrade the source/drain contacts. In addition, the programme of studies this thesis describes, also found that if the gate contact is deposited before the source/drain contacts, it causes a shift in threshold voltage towards negative values as the gate length decreases, because the ohmic contact anneal process affects the properties of the underlying material differently depending on whether it is covered with the gate metal or not. In terms of surface contamination; this work found that it causes device-to-device parameter variation, and a plasma clean is therefore essential. This work also demonstrated that the parasitic capacitances in the system, namely the contact periphery dependent gate-ohmic capacitance, plays a significant role in the total gate capacitance. This is true to such an extent that reducing the distance between the gate and the source/drain ohmic contacts in the device would help with shifting the threshold voltages closely towards the designed values. The findings made available by the collection of experiments performed for this work have two major applications. Firstly, these findings provide useful data in the study of the possible phenomena taking place inside the metal/GaGdO/GaAs layers and interfaces as the result of chemical processes applied to it. In addition, these findings allow recommendations as to how to best approach fabrication of devices utilising these layers.

Design of a high sensitive double-gate field-effect transistor biosensor for DNA detection

The study of interactions between organic biomolecules and semiconducting surfaces is an important consideration for the design and fabrication of field-effect-transistor (FET) biosensor. This paper demonstrates DNA detection by employing a double-gate field effect transistor (DGFET). In addition, an investigation of sensitivity and signal to noise ratio (SNR) is carried out for different values of analyte concentration, buffer ion concentration, pH, reaction constant, etc. Sensitivity, which is indicated by the change of drain current, increases non-linearly after a specific value (∼1nM) of analyte concentration and decreases non-linearly with buffer ion concentration. However, sensitivity is linearly related to the fluidic gate voltage. The drain current has a significant effect on the positive surface group (-NH2) compared to the negative counterpart (-OH). Furthermore, the sensor has the same response at a particular value of pH (5.76) irrespective of the density of surface group, although it decreases with pH value. The signal to noise ratio is improved with higher analyte concentrations and receptor densities.

Subband mixing inducing negative resistance

A new double channel field-effect structure based on delta-doping technology is proposed Resonant tunneling between the channels is employed to control the transport along the interface plane. A realistic simulation is performed for several temperatures. We solve the Schrodinger and Poisson equations self-consistently and have found that a large peak-to-valley ratio in the current-voltage characteristic occurs at the whole range of temperature investigated this effect indicates the potential application of this phenomenon for switching devices, where the transversal conductivity can be controlled due to the coupling between states belonging to different channels.

Analysis of size quantization and temperature effects on the threshold voltage of thin silicon film double-gate metal-oxide-semiconductor field-effect transistor (MOSFET)

In this paper, we analyze the combined effects of size quantization and device temperature variations (T = 50K to 400 K) on the intrinsic carrier concentration (n(i)), electron concentration (n) and thereby on the threshold voltage (V-th) for thin silicon film (t(si) = 1 nm to 10 nm) based fully-depleted Double-Gate Silicon-on-Insulator MOSFETs. The threshold voltage (V-th) is defined as the gate voltage (V-g) at which the potential at the center of the channel (Phi(c)) begins to saturate (Phi(c) = Phi(c(sat))). It is shown that in the strong quantum confinement regime (t(si) <= 3nm), the effects of size quantization far over-ride the effects of temperature variations on the total change in band-gap (Delta E-g(eff)), intrinsic carrier concentration (n(i)), electron concentration (n), Phi(c(sat)) and the threshold voltage (V-th). On the other hand, for t(si) >= 4 nm, it is shown that size quantization effects recede with increasing t(si), while the effects of temperature variations become increasingly significant. Through detailed analysis, a physical model for the threshold voltage is presented both for the undoped and doped cases valid over a wide-range of device temperatures, silicon film thicknesses and substrate doping densities. Both in the undoped and doped cases, it is shown that the threshold voltage strongly depends on the channel charge density and that it is independent of incomplete ionization effects, at lower device temperatures. The results are compared with the published work available in literature, and it is shown that the present approach incorporates quantization and temperature effects over the entire temperature range. We also present an analytical model for V-th as a function of device temperature (T). (C) 2013 AIP Publishing LLC.

Effect of gate-drain/source overlap on the noise in 90 nm N-channel metal oxide semiconductor field effect transistors

In this paper, we have studied the effect of gate-drain/source overlap (LOV) on the drain channel noise and induced gate current noise (SIg) in 90 nm N-channel metal oxide semiconductor field effect transistors using process and device simulations. As the change in overlap affects the gate tunneling leakage current, its effect on shot noise component of SIg has been taken into consideration. It has been shown that “control over LOV” allows us to get better noise performance from the device, i.e., it allows us to reduce noise figure, for a given leakage current constraint. LOV in the range of 0–10 nm is recommended for the 90 nm gate length transistors, in order to get the best performance in radio frequency applications.

Threshold voltage modeling under size quantization for ultra-thin silicon double-gate metal-oxide-semiconductor field-effect transistor

We report on the threshold voltage modeling of ultra-thin (1 nm-5 nm) silicon body double-gate (DG) MOSFETs using self-consistent Poisson-Schrodinger solver (SCHRED). We define the threshold voltage (V th) of symmetric DG MOSFETs as the gate voltage at which the center potential (Φ c) saturates to Φ c (s a t), and analyze the effects of oxide thickness (t ox) and substrate doping (N A) variations on V th. The validity of this definition is demonstrated by comparing the results with the charge transition (from weak to strong inversion) based model using SCHRED simulations. In addition, it is also shown that the proposed V t h definition, electrically corresponds to a condition where the inversion layer capacitance (C i n v) is equal to the oxide capacitance (C o x) across a wide-range of substrate doping densities. A capacitance based analytical model based on the criteria C i n v C o x is proposed to compute Φ c (s a t), while accounting for band-gap widening. This is validated through comparisons with the Poisson-Schrodinger solution. Further, we show that at the threshold voltage condition, the electron distribution (n(x)) along the depth (x) of the silicon film makes a transition from a strong single peak at the center of the silicon film to the onset of a symmetric double-peak away from the center of the silicon film. © 2012 American Institute of Physics.

Short-channel polymer field-effect-transistor fabrication using spin-coating-induced edge template and ink-jet printing

A method to fabricate polymer field-effect transistors with submicron channel lengths is described. A thin polymer film is spin coated on a prepatterned resist with a low resolution to create a thickness contrast in the overcoated polymer layer. After plasma and solvent etching, a submicron-sized line structure, which templates the contour of the prepattern, is obtained. A further lift-off process is applied to define source-drain electrodes of transistors. With a combination of ink-jet printing, transistors with channel length down to 400 nm have been fabricated by this method. We show that drive current density increases as expected, while the on/off current ratio 106 is achieved. © 2005 American Institute of Physics.

Optical and electrical investigation of low dimensional self-assembled InAs quantum dot field effect transistors

Self-assembled InAs QD dot-in-a-well (DWELL) structures were grown on GaAs substrate by MBE system, and heterojunction modulation-doped field effect transistor (MODFET) was fabricated. The optical properties of the samples show that the photoluminescence of InAs/GaAs self-assembled quantum dot (SAQD) is at 1.265 mu m at 300 K. The temperature-dependence of the abnormal redshift of InAs SAQD wavelength with the increasing temperature was observed, which is closely related with the inhomogeneous size distribution of the InAs quantum dot. According to the electrical measurement, high electric field current-voltage characteristic of the MODFET device were obtained. The embedded InAs QD of the samples can be regard as scattering centers to the vicinity of the channel electrons. The transport property of the electrons in GaAs channel will be modulated by the QD due to the Coulomb interaction. It has been proposed that a MODFET embedded with InAs QDs presents a novel type of field effect photon detector.

Threshold behavior in backgating in GaAs metal-semiconductor field-effect transistors: Induced by limitation of channel-substrate junction to leakage current

An analytical model is proposed to understand backgating in GaAs metal-semiconductor field-effect transistors (MESFETs), in which the effect of channel-substrate (CS) junction is included. We have found that the limitation of CS junction to leakage current will cause backgate voltage to apply directly to CS junction and result in a threshold behavior in backgating effect. A new and valuable expression for the threshold voltage has been obtained. The corresponding threshold electric field is estimated to be in the range of 1000-4000 V/cm and for the first time is in good agreement with reported experimental data. More, the eliminated backgating effect in MESFETs that are fabricated on the GaAs epitaxial layer grown at low temperature is well explained by our theory. (C) 1997 American Institute of Physics.

THz Plasma Waves in Field-Effect-Transistors: A Monte Carlo Study

Sensing with electromagnetic waves having frequencies in the Terahertz-range is a very attractive investigative method with applications in fundamental research and industrial settings. Up to now, a lot of sources and detectors are available. However, most of these systems are bulky and have to be used in controllable environments such as laboratories. In 1993 Dyakonov and Shur suggested that plasma waves developing in field-effect-transistors can be used to emit and detect THz-radiation. Later on, it was shown that these plasma waves lead to rectification and allows for building efficient detectors. In contrast to the prediction that these plasma waves lead to new promising solid-state sources, only a few weak sources are known up to now. This work studies THz plasma waves in semiconductor devices using the Monte Carlo method in order to resolve this issue. A fast Monte Carlo solver was developed implementing a nonparabolic bandstructure representation of the used semiconductors. By investigating simplified field-effect-transistors it was found that the plasma frequency follows under equilibrium conditions the analytical predictions. However, no current oscillations were found at room temperature or with a current flowing in the channel. For more complex structures, consisting of ungated and gated regions, it was found that the plasma frequency does not follow the value predicted by the dispersion relation of the gated nor the ungated device.

Capacitive electrolyte-insulator-semiconductor structures functionalised with a polyelectrolyte/enzyme multilayer: New strategy for enhanced field-effect biosensing

A novel strategy for enhanced field-effect biosensing using capacitive electrolyte-insulator-semiconductor (EIS) structures functionalised with pH-responsive weak polyelectrolyte/enzyme or dendrimer/enzyme multilayers is presented. The feasibility of the proposed approach is exemplarily demonstrated by realising a penicillin biosensor based on a capacitive p-Si-SiO(2) EIS structure functionalised with a poly(allylamine hydrochloride) (PAH)/penicillinase and a poly(amidoamine) dendrimer/penicillinase multilayer. The developed sensors response to changes in both the local pH value near the gate surface and the charge of macromolecules induced via enzymatic reaction, resulting in a higher sensitivity. For comparison, an EIS penicillin biosensor with adsorptively immobilised penicillinase has been also studied. The highest penicillin sensitivity of 100 mV/dec has been observed for the EIS sensor functionalised with the PAH/penicillinase multilayer. The lower and upper detection limit was around 20 mu M and 10 mM, respectively. In addition, an incorporation of enzymes in a multilayer prepared by layer-by-layer technique provides a larger amount of immobilised enzymes per sensor area, reduces enzyme leaching effects and thus, enhances the biosensor lifetime (the loss of penicillin sensitivity after 2 months was 10-12%). (C) 2010 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

Numerical study of graphene as a channel material for field-effect transistors

Graphene excellent properties make it a promising candidate for building future nanoelectronic devices. Nevertheless, the absence of an energy gap is an open problem for the transistor application. In this thesis, graphene nanoribbons and pattern-hydrogenated graphene, two alternatives for inducing an energy gap in graphene, are investigated by means of numerical simulations. A tight-binding NEGF code is developed for the simulation of GNR-FETs. To speed up the simulations, the non-parabolic effective mass model and the mode-space tight-binding method are developed. The code is used for simulation studies of both conventional and tunneling FETs. The simulations show the great potential of conventional narrow GNR-FETs, but highlight at the same time the leakage problems in the off-state due to various tunneling mechanisms. The leakage problems become more severe as the width of the devices is made larger, and thus the band gap smaller, resulting in a poor on/off current ratio. The tunneling FET architecture can partially solve these problems thanks to the improved subthreshold slope; however, it is also shown that edge roughness, unless well controlled, can have a detrimental effect in the off-state performance. In the second part of this thesis, pattern-hydrogenated graphene is simulated by means of a tight-binding model. A realistic model for patterned hydrogenation, including disorder, is developed. The model is validated by direct comparison of the momentum-energy resolved density of states with the experimental angle-resolved photoemission spectroscopy. The scaling of the energy gap and the localization length on the parameters defining the pattern geometry is also presented. The results suggest that a substantial transport gap can be attainable with experimentally achievable hydrogen concentration.

Field-effect transistors fabricated from diluted magnetic semiconductor colloidal nanowires

Field-effect transistors (FETs) fabricated from undoped and Co2+-doped CdSe colloidal nanowires show typical n-channel transistor behaviour with gate effect. Exposed to microscope light, a 10 times current enhancement is observed in the doped nanowire-based devices due to the significant modification of the electronic structure of CdSe nanowires induced by Co2+-doping, which is revealed by theoretical calculations from spin-polarized plane-wave density functional theory.