Light of Extinction

Light of Extinction presents a diverse series of views into the complex antics of a semi-autonomous gaggle of robotic actants. Audiences initially enter into the 'backend' of the experience to be rudely confronted with the raw, messy operations of a horde of object-manipulating robotic forms. Seen through viewing apertures these ‘things’ deny any opportunity to grasp their imagined order. Audiences then flow on into the 'front end' of the work where now, seen through another aperture, the very same forms seemingly coordinate a stunning deep-field choreography, floating lusciously within inky landscapes of media, noise and embodied sound. As one series of conceptions slip into extinction, so others flow on in. The idea of the 'extinction of human experience' expresses a projected fear for that which will disappear when biodiverse worlds have descended into an era of permanent darkness. ‘Light Of Extinction' re-positions this anthropomorphic lament in order to suggest a more rounded acknowledgement of what might still remain - suggesting the previously unacknowledged power and place of autonomous, synthetic creation. Momentary disbelief gives way to a relieving celebration of the imagined birth of ‘things’ – without need for staples such as conventional light or the harmonious lullabies of long-extinguished sounds.

Topological design and modulation strategy for buck-boost three-level inverters

To date, designed topologies for DC-AC inversion with both voltage-buck and boost capabilities are mainly focused on two-level circuitries with extensions to three-level possibilities left nearly unexplored. Contributing to this area of research, this paper presents the design of a number of viable buck-boost three-level inverters that can also support bidirectional power conversion. The proposed front-end circuitry is developed from the Cuk-derived buck-boost two-level inverter, and by using the "alternative phase opposition disposition" (APOD) modulation scheme, the buck-boost three-level inverters can perform distinct five-level line voltage and three-level phase voltage switching by simply controlling the active switches located in the designed voltage boost section of the circuits. As a cost saving option, one active switch can further be removed from the voltage-boost section of the circuits by simply re-routing the gating commands of the remaining switches without influencing the ac output voltage amplitude. To verify the validity of the proposed inverters, Matlab/PLECS simulations were performed before a laboratory prototype was implemented for experimental testing.

Topological design and modulation strategy for buck-boost three-level inverters

To date, designed topologies for DC-AC inversion with both voltage buck and boost capabilities are mainly focused on two-level circuitries with extensions to three-level possibilities left nearly unexplored. Contributing to this area of research, this paper presents the design of a number of viable buck-boost three-level inverters that can also support bidirectional power conversion. The proposed front-end circuitry is developed from the Cuk-derived buck-boost two-level inverter, and by using the ldquoalternative phase opposition dispositionrdquo modulation scheme, the buck-boost three-level inverters can perform distinct five-level line voltage and three-level phase voltage switching by simply controlling the active switches located in the designed voltage boost section of the circuits. As a cost saving option, one active switch can further be removed from the voltage boost section of the circuits by simply rerouting the gating commands of the remaining switches without influencing the AC output voltage amplitude. To verify the validity of the proposed inverters, MATLAB/PLECS simulations were performed before a laboratory prototype was implemented for experimental testing.

Modulation and control of three-phase paralleled Z-source inverters for distributed generation applications

This paper presents a modulation and controller design method for paralleled Z-source inverter systems applicable for alternative energy sources like solar cells, fuel cells, or variablespeed wind turbines with front-end diode rectifiers. A modulation scheme is designed based on simple shoot-through principle with interleaved carriers to give enhanced ripple reduction in the system. Subsequently, a control method is proposed to equalize the amount of power injected by the inverters in the grid-connected mode and also to provide reliable supply to sensitive loads onsite in the islanding mode. The modulation and controlling methods are proposed to have modular independence so that redundancy, maintainability, and improved reliability of supply can be achieved. The performance of the proposed paralleled Z-source inverter configuration is validated with simulations carried out using Matlab/Simulink/Powersim. Moreover, a prototype is built in the laboratory to obtain the experimental verifications.

A novel matrix converter based resonant dual active bridge for V2G applications

Dual-active bridges (DABs) can be used to deliver isolated and bidirectional power to electric vehicles (EVs) or to the grid in vehicle-to-grid (V2G) applications. However, such a system essentially requires a two-stage power conversion process, which significantly increases the power losses. Furthermore, the poor power factor associated with DAB converters further reduces the efficiency of such systems. This paper proposes a novel matrix converter based resonant DAB converter that requires only a single-stage power conversion process to facilitate isolated bi-directional power transfer between EVs and the grid. The proposed converter comprises a matrix converter based front end linked with an EV side full-bridge converter through a high frequency isolation transformer and a tuned LCL network. A mathematical model, which predicts the behavior of the proposed system, is presented to show that both the magnitude and direction of the power flow can be controlled through either relative phase angle or magnitude modulation of voltages produced by converters. Viability of the proposed concept is verified through simulations. The proposed matrix converter based DAB, with a single power conversion stage, is low in cost, and suites charging and discharging in single or multiple EVs or V2G applications.

Doubly Fed Induction Generator for wind energy generation using nine-switch power converter

A Three-Phase Nine-Switch Converter (NSC) topology for Doubly Fed Induction Generator in wind energy generation is proposed in this paper. This converter topology was used in various applications such as Hybrid Electric Vehicles and Uninterruptable Power Supplies. In this paper, Nine-Switch Converter is introduced in Doubly Fed Induction Generator in renewable energy application for the first time. It replaces the conventional Back-to-Back Pulse Width Modulated voltage source converter (VSC) which composed of twelve switches in many DFIG applications. Reduction in number of switches is the most beneficial in terms of cost and power switching losses. The operation principle of Nine-Switch Converter using SPWM method is discussed. The resulting NSC performance of rotor side current control, active power and reactive control are compared with Back-to Back voltage source converter performance. DC link voltage regulation using front end converter is also presented. Finally the simulation results of DFIG performances using NSC and Back-to-Back VSC are analyzed and compared.

On Randomizing Hash Functions to Strengthen the Security of Digital Signatures

Halevi and Krawczyk proposed a message randomization algorithm called RMX as a front-end tool to the hash-then-sign digital signature schemes such as DSS and RSA in order to free their reliance on the collision resistance property of the hash functions. They have shown that to forge a RMX-hash-then-sign signature scheme, one has to solve a cryptanalytical task which is related to finding second preimages for the hash function. In this article, we will show how to use Dean’s method of finding expandable messages for finding a second preimage in the Merkle-Damgård hash function to existentially forge a signature scheme based on a t-bit RMX-hash function which uses the Davies-Meyer compression functions (e.g., MD4, MD5, SHA family) in 2 t/2 chosen messages plus 2 t/2 + 1 off-line operations of the compression function and similar amount of memory. This forgery attack also works on the signature schemes that use Davies-Meyer schemes and a variant of RMX published by NIST in its Draft Special Publication (SP) 800-106. We discuss some important applications of our attack.

Research on injury compensation and health outcomes : ignoring the problem of reverse causality led to a biased conclusion

Objective This study highlights the serious consequences of ignoring reverse causality bias in studies on compensation-related factors and health outcomes and demonstrates a technique for resolving this problem of observational data. Study Design and Setting Data from an English longitudinal study on factors, including claims for compensation, associated with recovery from neck pain (whiplash) after rear-end collisions are used to demonstrate the potential for reverse causality bias. Although it is commonly believed that claiming compensation leads to worse recovery, it is also possible that poor recovery may lead to compensation claims—a point that is seldom considered and never addressed empirically. This pedagogical study compares the association between compensation claiming and recovery when reverse causality bias is ignored and when it is addressed, controlling for the same observable factors. Results When reverse causality is ignored, claimants appear to have a worse recovery than nonclaimants; however, when reverse causality bias is addressed, claiming compensation appears to have a beneficial effect on recovery, ceteris paribus. Conclusion To avert biased policy and judicial decisions that might inadvertently disadvantage people with compensable injuries, there is an urgent need for researchers to address reverse causality bias in studies on compensation-related factors and health.

Phoenix activity: Regulatory challenges and the law

Remedying the mischief of phoenix activity is of practical importance. The benefits include continued confidence in our economy, law that inspires best practice among directors, and law that is articulated in a manner such that penalties act as a sufficient deterrent and the regulatory system is able to detect offenders and bring them to account. Any further reforms must accommodate and tolerate legal phoenix activity. Phoenix activity pushes tolerance of entrepreneurial activity to its absolute limits. The wisest approach would be to front end the reforms so as to alleviate the considerable detection and enforcement burden upon regulatory bodies. There is little doubt that breach of the existing law is difficult and expensive to detect; and this is a significant burden when regulators have shrinking budgets and are rapidly losing feet on the ground. This front end approach may need to include restrictions on access to limited liability. The more limited liability is misused, the stronger the argument to limit access to limited liability. This paper proposes that such an approach is a legitimate next step for a robust and mature capitalist economy.

FPGA based digital platform for the control of AC drives

This paper presents the new trend of FPGA (Field programmable Gate Array) based digital platform for the control of power electronic systems. There is a rising interest in using digital controllers in power electronic applications as they provide many advantages over their analog counterparts. A board comprising of Cyclone device EP1C12Q240C8 of Altera is used for developing this platform. The details of this board are presented. This developed platform can be used for the controller applications such as UPS, Induction Motor drives and front end converters. A real time simulation of a system can also be done. An open-loop induction motor drive has been implemented using this board and experimental results are presented.

Quality of ALICE SSD modules revealed by electrical tests

ALICE (A Large Ion Collider Experiment) is an experiment at CERN (European Organization for Nuclear Research), where a heavy-ion detector is dedicated to exploit the unique physics potential of nucleus-nucleus interactions at LHC (Large Hadron Collider) energies. In a part of that project, 716 so-called type V4 modules were assembles in Detector Laboratory of Helsinki Institute of Physics during the years 2004 - 2006. Altogether over a million detector strips has made this project the most massive particle detector project in the science history of Finland. One ALICE SSD module consists of a double-sided silicon sensor, two hybrids containing 12 HAL25 front end readout chips and some passive components, such has resistors and capacitors. The components are connected together by TAB (Tape Automated Bonding) microcables. The components of the modules were tested in every assembly phase with comparable electrical tests to ensure the reliable functioning of the detectors and to plot the possible problems. The components were accepted or rejected by the limits confirmed by ALICE collaboration. This study is concentrating on the test results of framed chips, hybrids and modules. The total yield of the framed chips is 90.8%, hybrids 96.1% and modules 86.2%. The individual test results have been investigated in the light of the known error sources that appeared during the project. After solving the problems appearing during the learning-curve of the project, the material problems, such as defected chip cables and sensors, seemed to induce the most of the assembly rejections. The problems were typically seen in tests as too many individual channel failures. Instead, the bonding failures rarely caused the rejections of any component. One sensor type among three different sensor manufacturers has proven to have lower quality than the others. The sensors of this manufacturer are very noisy and their depletion voltage are usually outside of the specification given to the manufacturers. Reaching 95% assembling yield during the module production demonstrates that the assembly process has been highly successful.

LPG Gas-Sensing System With SnO2 Thin-Film Transducer and 0.7-mu m CMOS Signal Conditioning ASIC

The design and implementation of a complete gas sensor system for liquified petroleum gas (LPG) gas sensing are presented. The system consists of a SnO2 transducer, a lowcost heater, an application specific integrated circuit (ASIC) with front-end interface circuitry, and a microcontroller interface for data logging. The ASIC includes a relaxation-oscillator-based heater driver circuit that is capable of controlling the sensor operating temperature from 100degC to 425degC. The sensor readout circuit in the ASIC, which is based on the resistance to time conversion technique, has been designed to measure the gas sensor response over three orders of resistance change during its interaction with gases.

An innovative clustering technique for unsupervized learning in the context of remotely sensed earth resources data analysis

A new clustering technique, based on the concept of immediato neighbourhood, with a novel capability to self-learn the number of clusters expected in the unsupervized environment, has been developed. The method compares favourably with other clustering schemes based on distance measures, both in terms of conceptual innovations and computational economy. Test implementation of the scheme using C-l flight line training sample data in a simulated unsupervized mode has brought out the efficacy of the technique. The technique can easily be implemented as a front end to established pattern classification systems with supervized learning capabilities to derive unified learning systems capable of operating in both supervized and unsupervized environments. This makes the technique an attractive proposition in the context of remotely sensed earth resources data analysis wherein it is essential to have such a unified learning system capability.

Field Flow Sensitive Pointer and Escape Analysis for Java Using Heap Array SSA

Context sensitive pointer analyses based on Whaley and Lam’s bddbddb system have been shown to scale to large Java programs. We provide a technique to incorporate flow sensitivity for Java fields into one such analysis and obtain an escape analysis based on it. First, we express an intraprocedural field flow sensitive analysis, using Fink et al.’s Heap Array SSA form in Datalog. We then extend this analysis interprocedurally by introducing two new φ functions for Heap Array SSA Form and adding deduction rules corresponding to them. Adding a few more rules gives us an escape analysis. We describe two types of field flow sensitivity: partial (PFFS) and full (FFFS), the former without strong updates to fields and the latter with strong updates. We compare these analyses with two different (field flow insensitive) versions of Whaley-Lam analysis: one of which is flow sensitive for locals (FS) and the other, flow insensitive for locals (FIS). We have implemented this analysis on the bddbddb system while using the SOOT open source framework as a front end. We have run our analysis on a set of 15 Java programs. Our experimental results show that the time taken by our field flow sensitive analyses is comparable to that of the field flow insensitive versions while doing much better in some cases. Our PFFS analysis achieves average reductions of about 23% and 30% in the size of the points-to sets at load and store statements respectively and discovers 71% more “caller-captured” objects than FIS.

A simple analog controller for single-phase half-bridge rectifier and its application to transformerless UPS

A simple, low-cost, constant frequency, analog controller is proposed for the front-end half-bridge rectifier of a single-phase transformerless UPS system to maintain near unity power factor at the input and zero dc-offset voltage at the output. The controller generates the required gating pulses by comparing the input current with a periodic, bipolar, linear carrier without sensing the input voltage. Two voltage controllers and a single integrator with reset are used to generate the required carrier. All the necessary control operations can be performed without using any PLL, multiplier and/or divider. The controller can be fabricated as a single integrated circuit. The control concept is validated through simulation and also experimentally on an 800W half-bridge rectifier. Experimental results are presented for ac-dc application, and also for ac-dc-ac UPS application with both sinusoidal and nonlinear loads. The simulation and experimental results agree well.