A sucessão em sede de reversão do processo de execução fiscal

Dissertação de mestrado em Direito Tributário e Fiscal

An interactive web-based tool for breast reduction surgery simulation

In this work, we present a 3D web-based interactive tool for numerical modeling and simulation approach to breast reduction surgery simulation, to assist surgeons in planning all aspects related to breast reduction surgery before the actual procedure takes place, thereby avoiding unnecessary risks. In particular, it allows the modeling of the initial breast geometry, the definition of all aspects related to the surgery and the visualization of the post-surgery breast shape in a realistic environment.

Desenvolvimento de um processador VLIW

Dissertação de mestrado integrado em Engenharia Eletrónica Industrial e Computadores

Utilização de computação de elevado desempenho para a simulação de problemas de hidrodinâmica costeira

Dissertação de mestrado integrado em Engenharia Civil

O desenvolvimento do pensamento abstrato através de game-based learning e do Scratch

Relatório de estágio de mestrado em Ensino de Informática

Aceleración de Algoritmos en Procesadores Multicore, GPGPU y FPGA. Algorithm Acceleration with Multicore, GPGPU and FPGA Processors.

El avance en la potencia de cómputo en nuestros días viene dado por la paralelización del procesamiento, dadas las características que disponen las nuevas arquitecturas de hardware. Utilizar convenientemente este hardware impacta en la aceleración de los algoritmos en ejecución (programas). Sin embargo, convertir de forma adecuada el algoritmo en su forma paralela es complejo, y a su vez, esta forma, es específica para cada tipo de hardware paralelo. En la actualidad los procesadores de uso general más comunes son los multicore, procesadores paralelos, también denominados Symmetric Multi-Processors (SMP). Hoy en día es difícil hallar un procesador para computadoras de escritorio que no tengan algún tipo de paralelismo del caracterizado por los SMP, siendo la tendencia de desarrollo, que cada día nos encontremos con procesadores con mayor numero de cores disponibles. Por otro lado, los dispositivos de procesamiento de video (Graphics Processor Units - GPU), a su vez, han ido desarrollando su potencia de cómputo por medio de disponer de múltiples unidades de procesamiento dentro de su composición electrónica, a tal punto que en la actualidad no es difícil encontrar placas de GPU con capacidad de 200 a 400 hilos de procesamiento paralelo. Estos procesadores son muy veloces y específicos para la tarea que fueron desarrollados, principalmente el procesamiento de video. Sin embargo, como este tipo de procesadores tiene muchos puntos en común con el procesamiento científico, estos dispositivos han ido reorientándose con el nombre de General Processing Graphics Processor Unit (GPGPU). A diferencia de los procesadores SMP señalados anteriormente, las GPGPU no son de propósito general y tienen sus complicaciones para uso general debido al límite en la cantidad de memoria que cada placa puede disponer y al tipo de procesamiento paralelo que debe realizar para poder ser productiva su utilización. Los dispositivos de lógica programable, FPGA, son dispositivos capaces de realizar grandes cantidades de operaciones en paralelo, por lo que pueden ser usados para la implementación de algoritmos específicos, aprovechando el paralelismo que estas ofrecen. Su inconveniente viene derivado de la complejidad para la programación y el testing del algoritmo instanciado en el dispositivo. Ante esta diversidad de procesadores paralelos, el objetivo de nuestro trabajo está enfocado en analizar las características especificas que cada uno de estos tienen, y su impacto en la estructura de los algoritmos para que su utilización pueda obtener rendimientos de procesamiento acordes al número de recursos utilizados y combinarlos de forma tal que su complementación sea benéfica. Específicamente, partiendo desde las características del hardware, determinar las propiedades que el algoritmo paralelo debe tener para poder ser acelerado. Las características de los algoritmos paralelos determinará a su vez cuál de estos nuevos tipos de hardware son los mas adecuados para su instanciación. En particular serán tenidos en cuenta el nivel de dependencia de datos, la necesidad de realizar sincronizaciones durante el procesamiento paralelo, el tamaño de datos a procesar y la complejidad de la programación paralela en cada tipo de hardware. Today´s advances in high-performance computing are driven by parallel processing capabilities of available hardware architectures. These architectures enable the acceleration of algorithms when thes ealgorithms are properly parallelized and exploit the specific processing power of the underneath architecture. Most current processors are targeted for general pruposes and integrate several processor cores on a single chip, resulting in what is known as a Symmetric Multiprocessing (SMP) unit. Nowadays even desktop computers make use of multicore processors. Meanwhile, the industry trend is to increase the number of integrated rocessor cores as technology matures. On the other hand, Graphics Processor Units (GPU), originally designed to handle only video processing, have emerged as interesting alternatives to implement algorithm acceleration. Current available GPUs are able to implement from 200 to 400 threads for parallel processing. Scientific computing can be implemented in these hardware thanks to the programability of new GPUs that have been denoted as General Processing Graphics Processor Units (GPGPU).However, GPGPU offer little memory with respect to that available for general-prupose processors; thus, the implementation of algorithms need to be addressed carefully. Finally, Field Programmable Gate Arrays (FPGA) are programmable devices which can implement hardware logic with low latency, high parallelism and deep pipelines. Thes devices can be used to implement specific algorithms that need to run at very high speeds. However, their programmability is harder that software approaches and debugging is typically time-consuming. In this context where several alternatives for speeding up algorithms are available, our work aims at determining the main features of thes architectures and developing the required know-how to accelerate algorithm execution on them. We look at identifying those algorithms that may fit better on a given architecture as well as compleme

Soldadura por uma das extremidades de dois cromossômios homólogos do tityus

In this paper the author describes a very interesting case of union of two homologous chromosomes of the scorpion Tityus bahiensis just by the opposite extremities. The two normal pairs of chromosomes behave as ordinarily, the members of each pair showing at times a slight disturbance in their regular parallelism. The complex chromosome, on the contrary, behaves itself as if it were devoid of kinetochores, that is, it does not orient like normal chromosomes nor reveal any kind of active movement. The fusion of the chromosomes has resulted from terminal breakage at the opposite ends, the correspondig fragments having been found unpaired in a cell in which two pairs of chromosomes were present. Consequently, the compound chromosome, like the normal ones, is provided with a kinetochore at each one of the free ends. Being thus a centric chromosome its behavior, or more exactly, its kinetic inactivity may be compared with that of the monovalents found elsewhere in meioses. It is due o the failure of a partner. The fusion of two homologous chromosomes has transformed them into a new chromosomal unit in whose corresponding parts the ability of pairing was entirely abolished. This result is in full contradiction with the theory of a point-to point attraction between homologous chromosomes attributed to particular power of the genes, since, if genes really exist, being placed in their original loci, they would promote the union side by side of the members of the compound chromosome. If an attraction loci-to-loci should prevail the compound chromosome would be bent as in Fig. 8, C or form a ring similar to the loops observed in the inverted segment of sailvary chromosomes of Drosophila, as represented in the Fig. 8, D and this, in accordance with the order of the loci resulting from an union of corresponding or opposite ends of the fused chromosomes, as indicated in the Fig, 8 A and B. The evidence in hand points to a fusion by non homologous extremities. The expected rings, however, have never been found in metaphase plates. From this fact the author concludes that there is no point-to-point attraction between chromosomes, a conclusion in full agreement with the behavior of Hemipteran chromosomes which, in spite of geing composed of two equivalent halves do not bend in order to adjust the corresponding loci. (Cf. the papers on Hemiptera published by the author in this volume).

Nitrificação e aproveitamento de alguns adubos nitrogenados

The rate of nitrification of several nitrogenous fertilizers (ammonium sulfate, nitre-chalk, ureia, and cottonseed meal) was studied in three soils, namely, "terra roxa legítima", a red soil derived from basalt, "terra roxa misturada", a soil also derived from basalt but with a higher proportion of sand, and "areito Corumbataí", a sandy soil. The effects of the following treatments on nitrification were considered: addition of limestone of micronutrients (Fe, Cu, Zn, Mn, and Mo), and inoculation with a suspension of spores of Aspergillus wentii, a heterotrophic nitrifier. The results showed that: in "terra roxa legítima" limestone had no influence on the nitrification rate, whereas the micronutrients estimulated the oxidation of nitre-chalk, cottonseed meal and urea; inoculation with A. wentii helped only the nitrification of ammonium sulfate and of the cottonseed meal; the latter, in all the treatments employed gave use to a smaller amount of nitrates; in "terra roxa misturada", all the fertilizers depending upon the treatments they were subjected to, presented maximum values for nitrification; limestone estimulated the oxidation of ammonium sulfate as well as the mineralization of the cottonseed meal; the addition of micronutrients helped the nitrification of all the fertilizers, except that of urea; inoculation showed a benefical influence on the nitrification of ammonium sulfate and cottonseed meal; in "arenito de Corumbatai", the amounts of nitrates produced was roughly the same for all the fertilizers investigated; limestone estimulated the nitrification of nitro-chalk, ammonium sulfate and cottonseed meal whilst the addition of micronutrients benefited only the latter two; the inoculation with A. wentii helped the oxidation of all the fertilizers. In order to study the availability of the various fertilizers above discussed, two plant growing experiments were carried cut, one in pots, using the three soil types and another one in the field, with "terra roxa misturada". In "arenito de Corumbatai" there was no significant difference in the yield both of straw and rice grains for none of the fertilizers: Chilean nitrate of soda was used as a control; ho marked agreement could be detected between the data concerning nitrification and the yield results. In "terra roxa legítima", ammonium sulfate won the competition and there was a good parallelism between nitrification and yield. In "terra roxa misturada", there was no statistical difference among the various fertilizers; the agreement between nitrification and yields was reasonable. In the field (corn), Chilean nitrate, ammonium sulfate and nitro-chalk were clearly beter than urea and cottonseed meal which did not differ from the minus nitrogen plots.

Absorção de zinco pela cana de açúcar, Co 419, em função da idade

The status of zinc in sugar cane, variety Co 419, troughout its life cyle, was studid in samples cut monthly, from the 6th to 15th month, from an experiment carried on under the conditions of soil and climate prevailing in Piracicaba, State of São Paulo, Brazil. The experiment consisted of 6plots, 3 fertilized and 3 unfertilized. The fertilized ones received 40 kg of N (ammonium sulfate), 100 kg P2O5 (superphosphate) and 40 kg K2O (potassium cloride) per hectare, just before planting. The zinc content was determined by the Zincon method, after separation of zinc from other ions by means of the ion Exchange Resin III, Merck. The results obtained show that there was a tendency to decrease the zinc level in the stalks, whereas it kept more or less constant in the leaves; there was an exception in January, when the zinc level in the stalks had a sharp raise: 38-90-20 and 28-60-23 ppm for the fertilized an unfertilized treatments. There was a parallelism in the absorption of zinc by the plants from 4 hills of both treatments, through the whole - plantcycle but, the total amount taken up was higher with the fertilized plot due to its greater mass production.

Absorção de molibdênio pela cana de açúcar variedade Co 419, em função da idade

In this paper the authors describe the results obtained from the determination of molybdenum in sugar cane plant, grown in soils and climate prevailing in Piracicaba, State of São Paulo, Brazil. The molybdenum was determined in samples cut monthly from the 8th to 14th month, from an experiment consisting of 6 plots, 3 fertilized and 3 unfertilized. The fertilized treatment received 40 kg N (ammonium sulfate) 100 kg P2O3, (superphosphate) and 40 kg K2O (potassium chloride) per hectare, just before planting. Molybdenum was determined by thiocyanate-stannous chloride method, using carbon tetrachloride-butyl alcohol misture, for extrating the colored complex. The results obtained show a parallelism in the absorption of molybdenum by the plants of both treatments. The concentration of molybdenum in the stalks have a tendency to decrease, where as it kept more or less constant in leaves, with a exception in the 14° month when it rised probable because of a migration of molybdenum of the stalks to the leaves. The total amount molybdenum taken up was higher with the fertilized plot due its greater mass prodution.

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware Implementations

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniques for maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables, and an approach for performing parallel addition of N input symbols.

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware : Implementations,Parallelization Prospectsand Possible Improvements

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniquesfor maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables,and an approach for performing parallel addition of N input symbols.

Análisis de prestaciones de procesadores multi-core y multi-thread

Los procesadores multi-core y el multi-threading por hardware permiten aumentar el rendimiento de las aplicaciones. Por un lado, los procesadores multi-core combinan 2 o más procesadores en un mismo chip. Por otro lado, el multi-threading por hardware es una técnica que incrementa la utilización de los recursos del procesador. Este trabajo presenta un análisis de rendimiento de los resultados obtenidos en dos aplicaciones, multiplicación de matrices densas y transformada rápida de Fourier. Ambas aplicaciones se han ejecutado en arquitecturas multi-core que explotan el paralelismo a nivel de thread pero con un modelo de multi-threading diferente. Los resultados obtenidos muestran la importancia de entender y saber analizar el efecto del multi-core y multi-threading en el rendimiento.

Alineamiento de secuencias genéticas en procesadores multicore

Este trabajo analiza el rendimiento del algoritmo de alineamiento de secuencias conocido como Needleman-Wunsch, sobre 3 sistemas de cómputo multiprocesador diferentes. Se analiza y se codifica el algoritmo serie usando el lenguaje de programación C y se plantean una serie de optimizaciones con la finalidad de minimizar el volumen y el tiempo de cómputo. Posteriormente, se realiza un análisis de las prestaciones del programa sobre los diferentes sistemas de cómputo. En la segunda parte del trabajo, se paraleliza el algoritmo serie y se codifica ayudándonos de OpenMP. El resultado son dos variantes del programa que difieren en la relación entre la cantidad de cómputo y la de comunicación. En la primera variante, la comunicación entre procesadores es poco frecuente y se realiza tras largos periodos de ejecución (granularidad gruesa). En cambio, en la segunda variante las tareas individuales son relativamente pequeñas en término de tiempo de ejecución y la comunicación entre los procesadores es frecuente (granularidad fina). Ambas variantes se ejecutan y analizan en arquitecturas multicore que explotan el paralelismo a nivel de thread. Los resultados obtenidos muestran la importancia de entender y saber analizar el efecto del multicore y multithreading en el rendimiento.

Factores de rendimiento en entornos multicore

Este documento refleja el estudio de investigación para la detección de factores que afectan al rendimiento en entornos multicore. Debido a la gran diversidad de arquitecturas multicore se ha definido un marco de trabajo, que consiste en la adopción de una arquitectura específica, un modelo de programación basado en paralelismo de datos, y aplicaciones del tipo Single Program Multiple Data. Una vez definido el marco de trabajo, se han evaluado los factores de rendimiento con especial atención al modelo de programación. Por este motivo, se ha analizado la librería de threads y la API OpenMP para detectar aquellas funciones sensibles de ser sintonizadas al permitir un comportamiento adaptativo de la aplicación al entorno, y que dependiendo de su adecuada utilización han de mejorar el rendimiento de la aplicación.