Three filter beds for arsenite and chromate removal

Arsenic (As) and chromium (Cr) are two of the most toxic pollutants introduced into natural waters from a variety of sources, and they cause various adverse effects on living bodies when their concentrations exceed permissible limits. Laboratory experiments have been conducted to investigate the sorption of As and Cr on carbon steel and removal of trace elements from drinking water with a household filtration process. The affinity of As and Cr species for iron/iron carbide (Fe/Fe3C) sites is the key factor in controlling the removal of the elements. The method is based on the use of powder carbon steel, powdered block carbon, and ball ceramic in the ion-sorption columns as a cleaning process. The presence of carbon steel in a system that contains As3+ and Cr6+ might have a potential effect.

Trace elements removal from water using modified activated carbon

This paper present the possible alternative options for the remove of trace elements from drinking water supplies in the trace. Arsenic and chromium are two of the most toxic pollutants, introduced into natural waters from a variety of sources and causing various adverse effects on living bodies. The performance of three filter bed methods was evaluated in the laboratory. Experiments were conducted to investigate the sorption of arsenic and chromium on carbon steel and removal of trace elements from drinking water with a household filtration process. The affinity of the arsenic and chromium species for Fe / Fe3C (iron / iron carbide) sites is the key factor controlling the removal of the elements. The method is based on the use of powdered block carbon, powder carbon steel and ceramic spheres in the ion-sorption columns as a cleaning process. The modified powdered block carbon is a satisfactory and economical sorbent for trace elements (arsenite and chromate) dissolved in water due to its low unit cost of about $23 and compatibility with the traditional household filtration system.

Micropatterning of single-walled carbon nanotube forest

In this work, high-aligned single-walled carbon nanotube (SWCNT) forest have been grown using a high-density plasma chemical vapor deposition technique (at room temperature) and patterned into micro-structures by photolithographic techniques, that are commonly used for silicon integrated circuit fabrication. The SWCNTs were obtained using pure methane plasma and iron as precursor material (seed). For the growth carbon SWCNT forest the process pressure was 15 mTorr, the RF power was 250W and the total time of the deposition process was 3 h. The micropatterning processes of the SWCNT forest included conventional photolithography and magnetron sputtering for growing an iron layer (precursor material). In this situation, the iron layer is patterned and high-aligned SWCNTs are grown in the where iron is present, and DLC is formed in the regions where the iron precursor is not present. The results can be proven by Scanning Electronic Microscopy and Raman Spectroscopy. Thus, it is possible to fabricate SWCNT forest-based electronic and optoelectronic devices. (C) 2010 Elsevier B.V. All rights reserved.

Electro-optically sensitive diamond-like carbon thin films deposited by reactive magnetron sputtering for electronic device applications

The goal of this work is to study and relate electrical and optical properties of diamond-like carbon (DLC) thin films for applications in electronic devices. DLC films were deposited in a reactive RF magnetron sputtering system on p-type silicon and glass substrates. The target was a 99.9999% pure, 6 in. diameter graphite plate and methane was used as processing gas. Eight DLC films were produced for each substrate, varying deposition time, the reactor pressure between 5 mTorr and 10 mTorr while the RF power was applied at 13.56 MHz and varied between 100, 150, 200 and 250W. After deposition, the films were analyzed by I-V and C-V measurements (Cheng et al. (2004) [1]) in order to determine the electric resistivity, photo-current response and dielectric constant, optical transmittance, used to find the optical gap by the Tauc method; and by photoluminescence analysis to determine the photoemission and confirm the optical band gap. These characteristics are compared and the influence of the deposition parameters is discussed. (C) 2011 Published by Elsevier B.V.

Harmonic Distortion of Unstrained and Strained FinFETs Operating in Saturation

The harmonic distortion (HD) exhibited by un-strained and biaxially strained fin-shaped field-effect transistors operating in saturation as single-transistor amplifiers has been investigated for devices with different channel lengths L and fin widths W(fin). The study has been performed through device characterization, 3-D device simulations, and modeling. Nonlinearity has been evaluated in terms of second- and third-order HDs (HD2 and HD3, respectively), and a discussion on its physical sources has been carried out. Also, the influence of the open-loop voltage gain AV in HD has been observed.

Nanostructured diamond-like carbon films characterization

In this work, we have studied the influence of the substrate surface condition on the roughness and the structure of the nanostructured DLC films deposited by high-density plasma chemical vapor deposition Four methods were used to modify the silicon wafers surface before starting the deposition processes of the nanostructured DLC films. micro-diamond powder dispersion, micro-graphite powder dispersion, and roughness generation by wet chemical etching and roughness generation by plasma etching. The reference wafer was only submitted to a chemical cleaning. It was possible to see that the final roughness and the sp(3) hybridization degree (that is related with the structure and chemical composition) strongly depend on the substrate surface conditions The surface roughness was observed by AFM and SEM and the hybridization degree of the DLC films was analyzed by Raman Spectroscopy Thus, the effects of the substrate surface on the DLC film structure were confirmed. These phenomena can be explained by the fact that the locally higher surface energy and the sharp edges may induce local defects promoting the nanostructured characteristics in the DLC films. (C) 2009 Elsevier B.V. All rights reserved.

Study of reactive sputtering titanium oxide for metal-oxide-semiconductor capacitors

Metal oxide semiconductor (MOS) capacitors with titanium oxide (TiO(x)) dielectric layer, deposited with different oxygen partial pressure (30,35 and 40%) and annealed at 550, 750 and 1000 degrees C, were fabricated and characterized. Capacitance-voltage and current-voltage measurements were utilized to obtain, the effective dielectric constant, effective oxide thickness, leakage current density and interface quality. The obtained TiO(x) films present a dielectric constant varying from 40 to 170 and a leakage current density, for a gate voltage of - 1 V, as low as 1 nA/cm(2) for some of the structures, acceptable for MOS fabrication, indicating that this material is a viable high dielectric constant substitute for current ultra thin dielectric layers. (C) 2009 Elsevier B.V. All rights reserved.

Influence of substrate surface topography in the deposition of nanostructured diamond-like carbon films by high density plasma chemical vapor deposition

In this work, we have studied the influence of the substrate surface condition on the roughness and the structure of the nanostructured DLC films deposited by High Density Plasma Chemical Vapor Deposition. Four methods were used to modify the silicon wafers surface before starting the deposition processes of the nanostructured DLC films: micro-diamond powder dispersion, micro-graphite powder dispersion, and roughness generation by wet chemical etching and roughness generation by plasma etching. The reference wafer was only submitted to a chemical cleaning. It was possible to see that the final roughness and the sp(3) hybridization degree strongly depend on the substrate surface conditions. The surface roughness was observed by AFM and SEM and the hybridization degree of the DLC films was analyzed by Raman Spectroscopy. In these samples, the final roughness and the sp(3) hybridization quantity depend strongly on the substrate surface condition. Thus, the effects of the substrate surface on the DLC film structure were confirmed. These phenomena can be explained by the fact that the locally higher surface energy and the sharp edges may induce local defects promoting the nanostructured characteristics in the DLC films. (C) 2008 Elsevier B.V. All rights reserved.

Improved generation lifetime model for the electrical characterization of single- and double-gate SOI nMOSFETs

This work proposes a refined technique for the extraction of the generation lifetime in single- and double-gate partially depleted SOI nMOSFETs. The model presented in this paper, based on the drain current switch-off transients, takes into account the influence of the laterally non-uniform channel doping, caused by the presence of the halo implanted region, and the amount of charge controlled by the drain and source junctions on the floating body effect when the channel length is reduced. The obtained results for single- gate (SG) devices are compared with two-dimensional numerical simulations and experimental data, extracted for devices fabricated in a 0.1 mu m SOI CMOS technology, showing excellent agreement. The improved model to determine the generation lifetime in double-gate (DG) devices beyond the considerations previously presented also consider the influence of the silicon layer thickness on the drain current transient. The extracted data through the improved model for DG devices were compared with measurements and two-dimensional numerical simulations of the SG devices also presenting a good adjustment with the channel length reduction and the same tendency with the silicon layer thickness variation.

Temperature influence on the gate-induced floating body effect parameters in fully depleted SOI nMOSFETs

The temperature influence on the gate-induced floating body effect (GIFBE) in fully depleted (FD) silicon-on-insulator (SOI) nMOSFETs is investigated, based on experimental results and two-dimensional numerical simulations. The GIFBE behavior will be evaluated taking into account the impact of carrier recombination and of the effective electric field mobility degradation on the second peak in the transconductance (gm). This floating body effect is also analyzed as a function of temperature. It is shown that the variation of the studied parameters with temperature results in a ""C"" shape of the threshold voltage corresponding with the second peak in the gm curve. (C) 2008 Elsevier Ltd. All rights reserved.

MEMS-based incandescent microlamps for integrated optics applications

In this work we present the fabrication and operation of incandescent microlamps for integrated optics applications. This microlamp emits white and infrared light from a chromium resistor embedded in a free-standing silicon oxynitride (SiO(x)N(y)) cantilever that can be coupled to an optical waveguide. In fact, the chromium resistor is sandwiched between layers of SiO(x)N(y) that isolate it from the atmosphere, while electric current heats the resistor to incandescent temperatures. The same SiO(x)N(y) material used in the microlamp fabrication is also used to produce the optical waveguides to allow a monolithic integration of light source and optical circuit. Front-side bulk micromachining of the silicon substrate in potassium hydroxide (KOH) solution is used to fabricate the cantilevers that thermally isolate the resistors from the substrate, thus reducing the heat transfer and the current required to light the lamp.

Harmonic distortion of 2-MOS structures for MOSFET-C filters implemented with n-type unstrained and strained FINFETS

This work investigates the harmonic distortion (HD) in 2-MOS balanced structures composed of triple gate FinFETs. HD has been evaluated through the determination of the third-order harmonic distortion (HD3), since this represents the major non-linearity source in balanced structures. The 2-MOS structures with devices of different channel lengths (L) and fin widths (W(fin)) have been studied operating in the linear region as tunable resistors. The analysis was performed as a function of the gate voltage, aiming to verify the correlation between operation bias and HD3. The physical origins of the non-linearities have been investigated and are pointed out. Being a resistive circuit, the 2-MOS structure is generally projected for a targeted on-resistance, which has also been evaluated in terms of HD3. The impact of the application of biaxial strain has been studied for FinFETs of different dimensions. It has been noted that HD3 reduces with the increase of the gate bias for all the devices and this reduction is more pronounced both in narrower and in longer devices. Also, the presence of strain slightly diminishes the non-linearity at a similar bias. However, a drawback associated with the use of strain engineering consists in a significant reduction of the on-resistance with respect to unstrained devices. (C) 2011 Elsevier Ltd. All rights reserved.

Improved effective charge density in MOS capacitors with PECVD SiOxNy dielectric layer obtained at low RF power

In this work SiOxNy films are produced and characterized. Series of samples were deposited by the plasma enhanced chemical vapor deposition (PECVD) technique at low temperatures from silane (SiH4), nitrous oxide (N2O) and helium (He) precursor gaseous mixtures, at different deposition power in order to analyze the effect of this parameter on the films structural properties, on the SiOxNy/Si interface quality and on the SiOxNy effective charge density. In order to compare the film structural properties with the interface (SiOxNy/Si) quality and effective charge density, MOS capacitors were fabricated using these films as dielectric layer. X-ray absorption near-edge spectroscopy (XANES), at the Si-K edge, was utilized to investigate the structure of the films and the material bonding characteristics were analyzed through Fourier transform infrared spectroscopy (FTIR). The MOS capacitors were characterized by low and high frequency capacitance (C-V) measurements, in order to obtain the interface state density (D-it) and the effective charge density (N-ss). An effective charge density linear reduction for decreasing deposition power was observed, result that is attributed to the smaller amount of ions present in the plasma for low RF power. (C) 2008 Elsevier B.V. All rights reserved.

Structural and morphological studies on SiOxNy thin films

In this work, the structure and morphology of silicon oxynitride films deposited by the PECVD technique were studied. The films were deposited under two different conditions: (a) SiOxNy with chemical compositions varying from SiO2 to Si3N4 via the control of a N2O + N-2 + SiH4 gas mixture, and (b) Si-rich SiOxNy films via the control of a N2O + SiH4 gas mixture. The analyses were performed using X-ray near edge spectroscopy (XANES) at the Si-K edge, transmission electron microscopy (TEM) and Rutherford backscattering spectroscopy (RBS). For samples with chemical composition varying from SiO2 to Si3N4, the diffraction patterns obtained by TEM exhibited changes with the chemical composition, in agreement with the XANES results. For silicon-rich silicon oxynitride samples, the formation of a-Si clusters was observed and the possibility of obtaining Si nanocrystals after annealing depending on the composition and temperature was realized. (C) 2007 Elsevier B.V. All rights reserved.

Impact of SEG on uniaxially strained MuGFET performance

This work focuses on the impact of the source and drain Selective Epitaxial Growth (SEG) on the performance of uniaxially strained MuGFETs. With the channel length reduction, the normalized transconductance (gm.L./W) of unstressed MuGFETs decreases due to the series resistance and short channel effects (SCE), while the presence of uniaxial strain improves the gm. The competition between the series resistance (R(s)) and the uniaxial strain results in a normalized gm maximum point for a specific channel length. Since the SEG structure influences both R(s) and the strain in the channel, this work studies from room down to low temperature how these effects influence the performance of the triple-gate FETs. For lower temperatures, the strain-induced mobility enhancement increases and leads to a shift in the maximum point towards shorter channel lengths for devices without SEG. This shift is not observed for devices with SEG where the strain level is much lower. At 150 K the gm behavior of short channel strained devices with SEG is similar to the non SEC ones due to the better gm temperature enhancement for devices without SEG caused by the strain. For lower temperatures SEG structure is not useful anymore. (C) 2011 Elsevier Ltd. All rights reserved.