Secreted cysteine proteases of the carcinogenic liver fluke, Opisthorchis viverrini: Regulation of cathepsin F activation by autocatalysis and trans-processing by cathepsin B

Opisthorchis viverrini is an important helminth pathogen of humans that is endemic in Thailand and Laos. Adult flukes reside within host bile ducts and feed on epithelial tissue and blood cells. Chronic opisthorchiasis is associated with severe hepatobiliary diseases such as cholangiocarcinoma. Here we report that adult O. viverrini secrete two major cysteine proteases: cathepsin F (Ov-CF-1) and cathepsin B1 (Ov-CB-1). Ov-CF-1 is secreted as an inactive zymogen that autocatalytically processes and activates to a mature enzyme at pH 4.5 via an intermolecular cleavage at the prosegment-mature domain junction. Ov-CB-1 is also secreted as a zymogen but, in contrast to Ov-CF-1, is fully active against peptide and macromolecular substrates despite retaining the N-terminal prosegment. The active Ov-CB-1 zymogen was capable of trans-activating Ov-CF-1 by proteolytic removal of its prosegment at pH 5.5, a pH at which the Ov-CF-1 zymogen cannot autocatalytically activate. Both cathepsins hydrolyse human haemoglobin but their combined action more efficiently degrades haemoglobin to smaller peptides than each enzyme alone. Ov-CF-1 degraded extracellular matrix proteins more effectively than Ov-CB-1 at physiological pH. We propose that Ov-CB-1 regulates Ov-CF-1 activity and that both enzymes work together to degrade host tissue contributing to the development of liver fluke-associated cholangiocarcinoma.

Optimization of heat transfer characteristics, flow distribution, and reaction processing for a microstructured reactor/heat-exchanger for optimal performance in platinum catalyzed ammonia oxidation

The present work is focused on the demonstration of the advantages of miniaturized reactor systems which are essential for processes where potential for considerable heat transfer intensification exists as well as for kinetic studies of highly exothermic reactions at near-isothermal conditions. The heat transfer characteristics of four different cross-flow designs of a microstructured reactor/heat-exchanger (MRHE) were studied by CFD simulation using ammonia oxidation on a platinum catalyst as a model reaction. An appropriate distribution of the nitrogen flow used as a coolant can decrease drastically the axial temperature gradient in the reaction channels. In case of a microreactor made of a highly conductive material, the temperature non-uniformity in the reactor is strongly dependent on the distance between the reaction and cooling channels. Appropriate design of a single periodic reactor/heat-exchanger unit, combined with a non-uniform inlet coolant distribution, reduces the temperature gradients in the complete reactor to less than 4degreesC, even at conditions corresponding to an adiabatic temperature rise of about 1400degreesC, which are generally not accessible in conventional reactors because of the danger of runaway reactions. To obtain the required coolant flow distribution, an optimization study was performed to acquire the particular geometry of the inlet and outlet chambers in the microreactor/heat-exchanger. The predicted temperature profiles are in good agreement with experimental data from temperature sensors located along the reactant and coolant flows. The results demonstrate the clear potential of microstructured devices as reliable instruments for kinetic research as well as for proper heat management in the case of highly exothermic reactions. (C) 2002 Elsevier Science B.V. All rights reserved.

Image processing chip for small object detection

A new, front-end image processing chip is presented for real-time small object detection. It has been implemented using a 0.6 µ, 3.3 V CMOS technology and operates on 10-bit input data at 54 megasamples per second. It occupies an area of 12.9 mm×13.6 mm (including pads), dissipates 1.5 W, has 92 I/O pins and is to be housed in a 160-pin ceramic quarter flat-pack. It performs both one- and two-dimensional FIR filtering and a multilayer perceptron (MLP) neural network function using a reconfigurable array of 21 multiplication-accumulation cells which corresponds to a window size of 7×3. The chip can cope with images of 2047 pixels per line and can be cascaded to cope with larger window sizes. The chip performs two billion fixed point multiplications and additions per second.

Applying an XC6200 to real-time image processing

This implementation of a two-dimensional discrete cosine transform demonstrates the development of a suitable architectural style for a specific technology-in this case, the Xilinx XC6200 FPGA series. The design exploits distributed arithmetic, parallelism, and pipelining to achieve a high-performance custom-computing implementation.