Applying an XC6200 to real-time image processing


Autoria(s): Woods, Roger; Trainor, Mary; Heron, Stephen
Data(s)

01/01/1998

Resumo

This implementation of a two-dimensional discrete cosine transform demonstrates the development of a suitable architectural style for a specific technology-in this case, the Xilinx XC6200 FPGA series. The design exploits distributed arithmetic, parallelism, and pipelining to achieve a high-performance custom-computing implementation.

Identificador

http://pure.qub.ac.uk/portal/en/publications/applying-an-xc6200-to-realtime-image-processing(7e3f82c7-5ea2-4bc9-b119-3bf586868054).html

Idioma(s)

eng

Direitos

info:eu-repo/semantics/restrictedAccess

Fonte

Woods , R , Trainor , M & Heron , S 1998 , ' Applying an XC6200 to real-time image processing ' IEEE DESIGN & TEST OF COMPUTERS , vol 15 , no. 1 , pp. 30-38 .

Palavras-Chave #/dk/atira/pure/subjectarea/asjc/1700/1708 #Hardware and Architecture
Tipo

article