Architectural synthesis of digital signal processing algorithms using ''IRIS''
Data(s) |
01/10/1997
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Identificador | |
Idioma(s) |
eng |
Direitos |
info:eu-repo/semantics/restrictedAccess |
Fonte |
Trainor , M , Woods , R & McCanny , J 1997 , ' Architectural synthesis of digital signal processing algorithms using ''IRIS'' ' Paper presented at 1995 Workshop on VLSI Signal Processing , Sakai , Japan , 01/10/1997 - 01/10/1997 , pp. 41-55 . |
Tipo |
conferenceObject |