A Scalable Low Power Issue Queue for Large Instruction Window Processors

Large instruction windows and issue queues are key to exploiting greater instruction level parallelism in out-of-order superscalar processors. However, the cycle time and energy consumption of conventional large monolithic issue queues are high. Previous efforts to reduce cycle time segment the issue queue and pipeline wakeup. Unfortunately, this results in significant IPC loss. Other proposals which address energy efficiency issues by avoiding only the unnecessary tag-comparisons do not reduce broadcasts. These schemes also increase the issue latency.To address both these issues comprehensively, we propose the Scalable Lowpower Issue Queue (SLIQ). SLIQ augments a pipelined issue queue with direct indexing to mitigate the problem of delayed wakeups while reducing the cycle time. Also, the SLIQ design naturally leads to significant energy savings by reducing both the number of tag broadcasts and comparisons required.A 2 segment SLIQ incurs an average IPC loss of 0.2% over the entire SPEC CPU2000 suite, while achieving a 25.2% reduction in issue latency when compared to a monolithic 128-entry issue queue for an 8-wide superscalar processor. An 8 segment SLIQ improves scalability by reducing the issue latency by 38.3% while incurring an IPC loss of only 2.3%. Further, the 8 segment SLIQ significantly reduces the energy consumption and energy-delay product by 48.3% and 67.4% respectively on average.

Multilevel inverters for low-power application

Multilevel inverters are an attractive solution in the medium-voltage and high-power applications. However in the low-power range also it can be a better solution compared to two-level inverters, if MOSFETs are used as devices switching in the order of 100 kHz. The effect of clamping diodes in the diode-clamped multilevel inverters play an important role in determining its efficiency. Power loss introduced by the reverse recovery of MOSFET body diode prohibits the use of MOSFET in hard-switched inverter legs. A technique of avoiding reverse recovery loss of MOSFET body diode in a three-level neutral point clamped inverter is suggested. The use of multilevel inverters topology enables operation at high switching frequency without sacrificing efficiency. High switching frequency of operation reduces the output filter requirement, which in turn helps in reducing the size of the inverter. This study elaborates the trade-off analysis to quantify the suitability of multilevel inverters in the low-power applications. Advantages of using a MOSFET-based three-level diode-clamped inverter for a PM motor drive and UPS systems are discussed.

Polymer thin film structures for ultra-low cost biosensing

Reflectance change due to binding of molecules on thin film structures has been exploited for bio-molecular sensing by several groups due to its potential in the development of sensitive, low cost, easy to fabricate, large area sensors with high multiplexing capabilities. However, all of these sensing platforms have been developed using traditional semiconductor materials and processing techniques, which are expensive. This article presents a method to fabricate disposable thin film reflectance biosensors using polymers, such as polycarbonate, which are 2-3 orders of magnitude cheaper than conventional semiconductor and dielectric materials and can be processed by alternate low cost methods, leading to significant reduction in consumable costs associated with diagnostic biosensing. (C) 2011 Elsevier GmbH. All rights reserved.

A low-noise low-power noise-adaptive neural amplifier in 0.13um CMOS technology

Chronic recording of neural signals is indispensable in designing efficient brain machine interfaces and in elucidating human neurophysiology. The advent of multichannel microelectrode arrays has driven the need for electronics to record neural signals from many neurons. The dynamic range of the system is limited by background system noise which varies over time. We propose a neural amplifier in UMC 130 nm, 2P8M CMOS technology. It can be biased adaptively from 200 nA to 2 uA, modulating input referred noise from 9.92 uV to 3.9 uV. We also describe a low noise design technique which minimizes the noise contribution of the load circuitry. The amplifier can pass signal from 5 Hz to 7 kHz while rejecting input DC offsets at electrode-electrolyte interface. The bandwidth of the amplifier can be tuned by the pseudo-resistor for selectively recording low field potentials (LFP) or extra cellular action potentials (EAP). The amplifier achieves a mid-band voltage gain of 37 dB and minimizes the attenuation of the signal from neuron to the gate of the input transistor. It is used in fully differential configuration to reject noise of bias circuitry and to achieve high PSRR.

Design of a Low Power 64 Point FFT Architecture for WLAN Applications

This paper presents a Radix-4(3) based FFT architecture suitable for OFDM based WLAN applications. The radix-4(3) parallel unrolled architecture presented here, uses a radix-4 butterfly unit which takes all four inputs in parallel and can selectively produce one out of the four outputs. A 64 point FFT processor based on the proposed architecture has been implemented in UMC 130nm 1P8M CMOS process with a maximum clock frequency of 100 MHz and area of 0.83mm(2). The proposed processor provides a throughput of four times the clock rate and can finish one 64 point FFT computation in 16 clock cycles. For IEEE 802.11a/g WLAN, the processor needs to be operated at a clock rate of 5 MHz with a power consumption of 2.27 mW which is 27% less than the previously reported low power implementations.

Field Emission with Ultra low Turn On Voltage from Metal Decorated Carbon Nanotubes

A simple and scalable method of decorating 3D-carbon nanotube (CNT) forest with metal particles has been developed. The results observed in aluminum (AI) decorated CNTs and copper (Cu) decorated CNTs on silicon (Si) and Inconel are compared with undecorated samples. A significant improvement in the field emission characteristics of the cold cathode was observed with ultralow turn on voltage (E-to similar to 0.1 V/mu m) due to decoration of CNTs with metal nanoparticles. Contact resistance between the CNTs and the substrate has also been reduced to a large extent, allowing us to get stable emission for longer duration without any current degradation, thereby providing a possibility of their use in vacuum microelectronic devices.

Amorphous W-S-N thin films: The atomic structure behind ultra-low friction

Amorphous W-S-N in the form of thin films has been identified experimentally as an ultra-low friction material, enabling easy sliding by the formation of a WS2 tribofilm. However, the atomic-level structure and bonding arrangements in amorphous W-S-N, which give such optimum conditions for WS2 formation and ultra-low friction, are not known. In this study, amorphous thin films with up to 37 at.% N are deposited, and experimental as well as state-of-the-art ab initio techniques are employed to reveal the complex structure of W-S-N at the atomic level. Excellent agreement between experimental and calculated coordination numbers and bond distances is demonstrated. Furthermore, the simulated structures are found to contain N bonded in molecular form, i.e. N-2, which is experimentally confirmed by near edge X-ray absorption fine structure and X-ray photoelectron spectroscopy analysis. Such N-2 units are located in cages in the material, where they are coordinated mainly by S atoms. Thus this ultra-low friction material is shown to be a complex amorphous network of W, S and N atoms, with easy access to W and S for continuous formation of WS2 in the contact region, and with the possibility of swift removal of excess nitrogen present as N-2 molecules. (C) 2014 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved.

Emergency Handling in MICS based Body Area Network

Body Area Network, a new wireless networking paradigm, promises to revolutionize the healthcare applications. A number of tiny sensor nodes are strategically placed in and around the human body to obtain physiological information. The sensor nodes are connected to a coordinator or a data collector to form a Body Area Network. The tiny devices may sense physiological parameters of emergency in nature (e.g. abnormality in heart bit rate, increase of glucose level above the threshold etc.) that needs immediate attention of a physician. Due to ultra low power requirement of wireless body area network, most of the time, the coordinator and devices are expected to be in the dormant mode, categorically when network is not operational. This leads to an open question, how to handle and meet the QoS requirement of emergency data when network is not operational? Emergency handling becomes more challenging at the MAC layer, if the channel access related information is unknown to the device with emergency message. The aforementioned scenarios are very likely scenarios in a MICS (Medical Implant Communication Service, 402-405 MHz) based healthcare systems. This paper proposes a mechanism for timely and reliable transfer of emergency data in a MICS based Body Area Network. We validate our protocol design with simulation in a C++ framework. Our simulation results show that more than 99 p ercentage of the time emergency messages are reached at the coordinator with a delay of 400ms.

Energy Efficient Memory Decoder Design for Ultra-Low Voltage Systems

This paper presents a low energy memory decoder architecture for ultra-low-voltage systems containing multiple voltage domains. Due to limitations in scalability of memory supply voltages, these systems typically contain a core operating at subthreshold voltages and memories operating at a higher voltage. This difference in voltage provides a timing slack on the memory path as the core supply is scaled. The paper analyzes the feasibility and trade-offs in utilizing this timing slack to operate a greater section of memory decoder circuitry at the lower supply. A 256x16-bit SRAM interface has been designed in UMC 65nm low-leakage process to evaluate the above technique with the core and memory operating at 280 mV and 500 mV respectively. The technique provides a reduction of up to 20% in energy/cycle of the row decoder without any penalty in area and system-delay.

Operand Isolation Circuits with Reduced Overhead for Low Power Data-Path Design

Dynamic power dissipation due to redundant switching is an important metric in data-path design. This paper focuses on the use of ingenious operand isolation circuits for low power design. Operand isolation attempts to reduce switching by clamping or latching the output of a first level of combinational circuit. This paper presents a novel method using power supply switching wherein both PMOS and NMOS stacks of a circuit are connected to the same power supply. Thus, the output gets clamped or latched to the power supply value with minimal leakage. The proposed circuits make use of only two transistors to clamp the entire Multiple Input Multiple Output (MIMO) block. Also, the latch-based designs have higher drive strength in comparison to the existing methods. Simulation results have shown considerable area reduction in comparison to the existing techniques without increasing timing overhead.

Adaptive Pulse Width Control and Sampling for Low Power Pulse Oximetry

Remote sensing of physiological parameters could be a cost effective approach to improving health care, and low-power sensors are essential for remote sensing because these sensors are often energy constrained. This paper presents a power optimized photoplethysmographic sensor interface to sense arterial oxygen saturation, a technique to dynamically trade off SNR for power during sensor operation, and a simple algorithm to choose when to acquire samples in photoplethysmography. A prototype of the proposed pulse oximeter built using commercial-off-the-shelf (COTS) components is tested on 10 adults. The dynamic adaptation techniques described reduce power consumption considerably compared to our reference implementation, and our approach is competitive to state-of-the-art implementations. The techniques presented in this paper may be applied to low-power sensor interface designs where acquiring samples is expensive in terms of power as epitomized by pulse oximetry.

Reactive interlayer based ultra-low moisture permeable membranes for organic photovoltaic encapsulation

Reactive interlayers consisting of zero valent iron and copper nanoparticles have been successfully incorporated into Surlyn films to fabricate moisture barrier materials with reduced water vapor permeabilities. The reactive nanoparticles dispersed in stearic acid were employed as the interlayers due to their ability to react with moisture. The water vapor transmission rates through the fabricated barrier films with reactive iron and copper interlayers decreased by over 4 orders of magnitude when compared to neat Surlyn. The flexibility and transparency of the barrier films have been evaluated by tensile and UV-visible experiments. Moreover, the accelerated aging studies conducted in accordance with the ISOS-III protocol confirmed the increased lifetimes of the organic photovoltaic (OPV) devices encapsulated with these reactive barrier films.

A strategy to achieve enhanced electromagnetic interference shielding at ultra-low concentration of multiwall carbon nanotubes in P alpha MSAN/PMMA blends in the presence of a random copolymer PS-r-PMMA

A unique strategy was adopted to achieve an ultra-low electrical percolation threshold of multiwall carbon nanotubes (MWNTs) (0.25 wt%) in a classical partially miscible blend of poly-alpha-methylstyrene-co-acrylonitrile and poly(methyl methacrylate) (P alpha MSAN/PMMA), with a lower critical solution temperature. The polymer blend nanocomposite was prepared by standard melt-mixing followed by annealing above the phase separation temperature. In a two-step mixing protocol, MWNTs were initially melt-mixed with a random PS-r-PMMA copolymer and subsequently diluted with 85/15 P alpha MSAN/PMMA blends in the next mixing step. Mediated by the PS-r-PMMA, the MWNTs were mostly localized at the interface and bridged the PMMA droplets. This strategy led to enhanced electromagnetic interference (EMI) shielding effectiveness at 0.25 wt% MWNTs through multiple scattering from MWNT-covered droplets, as compared to the blends without the copolymer, which were transparent to electromagnetic radiation.