BIT-LEVEL SYSTOLIC ARRAYS FOR SIGNAL AND IMAGE PROCESSING.

This paper describes the design and the architecture of a bit-level systolic array processor. The bit-level systolic array described is directly applicable to a wide range of image processing operations where high performance and throughput are essential. The architecture is illustrated by describing the operation of the correlator and convolver chips which are being developed. The advantage of the system is also discussed.

VLSI architectures for vector quantization

The real time implementation of an efficient signal compression technique, Vector Quantization (VQ), is of great importance to many digital signal coding applications. In this paper, we describe a new family of bit level systolic VLSI architectures which offer an attractive solution to this problem. These architectures are based on a bit serial, word parallel approach and high performance and efficiency can be achieved for VQ applications of a wide range of bandwidths. Compared with their bit parallel counterparts, these bit serial circuits provide better alternatives for VQ implementations in terms of performance and cost. © 1995 Kluwer Academic Publishers.

High performance VLSI architecture for Wave Digital Filtering

The application of fine grain pipelining techniques in the design of high performance Wave Digital Filters (WDFs) is described. It is shown that significant increases in the sampling rate of bit parallel circuits can be achieved using most significant bit (msb) first arithmetic. A novel VLSI architecture for implementing two-port adaptor circuits is described which embodies these ideas. The circuit in question is highly regular, uses msb first arithmetic and is implemented using simple carry-save adders. © 1992 Kluwer Academic Publishers.

VLSI architectures for digital image coding

A number of high-performance VLSI architectures for real-time image coding applications are described. In particular, attention is focused on circuits for computing the 2-D DCT (discrete cosine transform) and for 2-D vector quantization. The former circuits are based on Winograd algorithms and comprise a number of bit-level systolic arrays with a bit-serial, word-parallel input. The latter circuits exhibit a similar data organization and consist of a number of inner product array circuits. Both circuits are highly regular and allow extremely high data rates to be achieved through extensive use of parallelism.

Discrete cosine transform generator for VLSI synthesis

A generator for the automated design of Discrete Cosine Transform (DCT) cores is presented. This can be used to rapidly create silicon circuits from a high level specification. These compare very favourably with existing designs. The DCT cores produced are scaleable in terms of point size as well as input/output and coefficient wordlengths. This provides a high degree of flexibility. An example, 8-point 1D DCT design, produced occupies less than 0.92 mm when implemented in a 0.35µ double level metal CMOS technology. This can be clocked at a rate of 100MHz.

Pipelined two-port adaptor for wave digital filtering

The application of fine-grain pipelining techniques in the design of high-performance wave digital filters (WDFs) is described. The problems of latency in feedback loops can be significantly reduced if computations are organized most significant, as opposed to least significant, bit first and if the results are fed back as soon as they are formed. The result is that chips can be designed which offer significantly higher sampling rates than otherwise can be obtained using conventional methods. How these concepts can be extended to the more challenging problem of WDFs is discussed. It is shown that significant increases in the sampling rate of bit-parallel circuits can be achieved using most significant bit first arithmetic.

Rapid design of a single chip adaptive beamformer

This paper presents the design of a single chip adaptive beamformer which contains 5 million transistors and can perform 50 GigaFlops. The core processor of the adaptive beamformer is a QR-array processor implemented on a fully efficient linear systolic architecture. The paper highlights a number of rapid design techniques that have been used to realize the design. These include an architecture synthesis tool for quickly developing the circuit architecture and the utilization of a library of parameterizable silicon intellectual property (IP) cores, to rapidly develop the circuit layouts.

A 76-84 GHz SiGe power amplifier array employing low-loss four-way differential combining transformer

This paper presents holistic design of a novel four-way differential power-combining transformer for use in millimeter-wave power-amplifier (PA). The combiner with an inner radius of 25 µm exhibits a record low insertion loss of 1.25 dB at 83.5 GHz. It is designed to simultaneously act as a balanced-to-unbalanced converter, removing the need for additional BALUNs typically required in differential circuits. A complete circuit comprised of a power splitter, two-stage differential cascode PA array, a power combiner as well as input and output matching elements was designed and realized in SiGe technology with f/f 170/250 GHz. Measured small-signal gain of at least 16.8 dB was obtained from 76.4 to 85.3 GHz with a peak 19.5 dB at 83 GHz. The prototype delivered 12.5 dBm output referred 1 dB compression point and 14 dBm saturated output power when operated from a 3.2 V dc supply voltage at 78 GHz.

Design and analysis of dual-rail circuits for security applications

Dual-rail encoding, return-to-spacer protocol, and hazard-free logic can be used to resist power analysis attacks by making energy consumed per clock cycle independent of processed data. Standard dual-rail logic uses a protocol with a single spacer, e.g., all-zeros, which gives rise to energy balancing problems. We address these problems by incorporating two spacers; the spacers alternate between adjacent clock cycles. This guarantees that all gates switch in every clock cycle regardless of the transmitted data values. To generate these dual-rail circuits, an automated tool has been developed. It is capable of converting synchronous netlists into dual-rail circuits and it is interfaced to industry CAD tools. Dual-rail and single-rail benchmarks based upon the advanced encryption standard (AES) have been simulated and compared in order to evaluate the method and the tool.

Enhanced efficiency of envelope-tracking based broadband inverse class-E power amplifier

In this paper, the envelope-tracking technique is exploited to boost average efficiency of the newly introduced broadband Inverse Class-E power amplifier. A 2.26 GHz - 20.5 dBm - 3 V power amplifier was designed, constructed, and measured. For a multi-carrier input signal with 10 dB peak-to-average ratio, the average PAE was increased from 5.7% to 54.5%. © 2008 IEEE.

Complex pattern of genetic structuring in the Atlantic salmon (Salmo salar L.) of the River Foyle system in northwest Ireland: disentangling the evolutionary signal from population stochasticity

Little is known about the microevolutionary processes shaping within river population genetic structure of aquatic organisms characterized by high levels of homing and spawning site fidelity. Using a microsatellite panel, we observed complex and highly significant levels of intrariver population genetic substructure and Isolation-by-Distance, in the Atlantic salmon stock of a large river system. Two evolutionary models have been considered explaining mechanisms promoting genetic substructuring in Atlantic salmon, the member-vagrant and metapopulation models. We show that both models can be simultaneously used to explain patterns and levels of population structuring within the Foyle system. We show that anthropogenic factors have had a large influence on contemporary population structure observed. In an analytical development, we found that the frequently used estimator of genetic differentiation, F-ST, routinely underestimated genetic differentiation by a factor three to four compared to the equivalent statistic Jost's D-est (Jost 2008). These statistics also showed a near-perfect correlation. Despite ongoing discussions regarding the usefulness of "adjusted" F-ST statistics, we argue that these could be useful to identify and quantify qualitative differences between populations, which are important from management and conservation perspectives as an indicator of existence of biologically significant variation among tributary populations or a warning of critical environmental damage.

Dissection of Host Cell Signal Transduction during Acinetobacter baumannii – Triggered Inflammatory Response

Infected airway epithelial cells up-regulate the expression of chemokines, chiefly IL-8, and antimicrobial molecules including ß-defensins (BD). Acinetobacter baumannii is a cause of hospital-acquired pneumonia. We examined whether A. baumannii induced the expressions of IL-8 and BD2 by airway epithelial cells and the receptors implicated in bacterial detection. A549 and human primary airway cells released IL-8 upon infection. A. baumannii-infected cells also increased the expression of BD2 which killed A. baummannii strains. IL-8 induction was via NF-B and mitogen-activated kinases p38 and p44/42-dependent pathways. A. baumannii engaged Toll-like receptor (TLR) 2 and TLR4 pathways and A549 cells could use soluble CD14 as TLRs co-receptor. A. baumannii lipopolysaccharide stimulated IL-8 release by A549 cells and sCD14 facilitated the recognition of the lipopolysaccharide. Mass spectrometry analysis revealed that A. baumannii lipid A structure matches those with endotoxic potential. These results demonstrate that airway epithelial cells produce mediators important for A. baumannii clearance. © 2010 March et al.

Effect of the surface water layer on the optical signal in apertureless scanning near field optical microscopy

Optical signals measured in apertureless scanning near field optical microscopy (ASNOM) under ambient conditions are found to be affected significantly by the thin water layer absorbed on the surface under investigation, the presence of which is detected through measurements of the shear force experienced by the tip. This water layer also results in a large hysteresis between optical signals measured during approach and withdrawal of the tip to the sample surface. The role of this effect in ASNOM is anticipated to be significant, with the possibility of resultant topographically induced artefacts for ASNOM involving intermittent contact of tip and sample, but also providing a potential mechanism for nanoscale optical resolution.