VLSI architectures for digital image coding
Data(s) |
01/01/1990
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Resumo |
A number of high-performance VLSI architectures for real-time image coding applications are described. In particular, attention is focused on circuits for computing the 2-D DCT (discrete cosine transform) and for 2-D vector quantization. The former circuits are based on Winograd algorithms and comprise a number of bit-level systolic arrays with a bit-serial, word-parallel input. The latter circuits exhibit a similar data organization and consist of a number of inner product array circuits. Both circuits are highly regular and allow extremely high data rates to be achieved through extensive use of parallelism. |
Identificador | |
Idioma(s) |
eng |
Direitos |
info:eu-repo/semantics/restrictedAccess |
Fonte |
Yan , M , McCanny , J V & Hu , Y 1990 , ' VLSI architectures for digital image coding ' ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings , vol 2 , pp. 913-916 . |
Tipo |
article |