Recent progresses of SOI-based photonic devices - art. no. 60201R

SOI (Silicon on Insulator) based photonic devices, including stimulated emission from Si diode, RCE (Resonant Cavity Enhanced) photodiode with quantum structure, MOS (Metal Oxide Semiconductor) optical modulator with high frequency, SOI optical matrix switch and wavelength tunable filter are reviewed in the paper. The emphasis will be played on our recent results of SOI-based thermo-optic waveguide matrix switch with low insertion loss and fast response. A folding re-arrangeable non-blocking 4x4 matrix switch with total internal reflection (TIR) mirrors and a first blocking 16 x 16 matrix were fabricated on SOI wafer. The extinction ratio and the crosstalk are better. The insertion loss and the polarization dependent loss (PDL) at 1.55 mu m increase slightly with longer device length and more bend and intersecting waveguides. The insertion losses are expected to decrease 2-3 dB when anti-reflection films are added in the ends of the devices. The rise and fall times of the devices are 2.1 mu s and 2.3 mu s, respectively.

Novel compact SOI-based reconfigurable optical add/drop multiplexer using microring resonators - art. no. 60190L

Novel compact design for 4-channel SOI-based reconfigurable optical add/drop multiplexer using microring resonators is presented and analyzed. Microring resonators have two important attributes as a key new technology for future optical communications, namely functionality and compactness. Functionality refers to the fact that a wide range of desirable filter characteristics can be synthesized by coupling multiple rings. Compactness refers the fact that ring resonators with radii about 30 mu m can lead to large scale integration of devices with densities on the order of 10(4) similar to 10(5) devices per square centimeter. A 4-channel reconfigurable optical add/drop multiplexer comprises a grid-like array of ridge waveguides which perpendicularly cross through each other. SOI-based resonators consisted of multiple rings at each of the cross-grid nodes serve as the wavelength selective switch, and they can switch an optical signal between two ports by means of tuning refractive index of one of the rings. The thermo-optic coefficient of silicon is 1.86x 10(-4) /K. Thus a temperature rise of 27K will increase the refractive index by 5 x 10(-3), which is enough to cause the switching of our designed microring resonators. The thermo-optic effect is used to suppress the resonator power transfer, rather than to promote loss. Thus, the input signal only suffers small attenuation and simultaneously low crosstalk can be achieved by using multiple rings.

A V-shaped module technique for promoting generation photocurrent density of silicon solar cells

A V-shaped solar cell module consists of two tilted mono-crystalline cells [J. Li, China Patent No. 200410007708.6 (March, 2004)]. The angle included between the two tilted cells is 90 degrees. The two cells were fabricated by using polished silicon wafers. The scheme of both-side polished wafers has been proposed to reduce optical loss. Compared to solar cells in a planar way, the V-shaped structure enhances external quantum efficiency and leads to an increase of 15% in generation photocurrent density. The following three kinds of trapped photons are suggested to contribute to the increase: (1) infrared photons converted from visible photons due to a transformation mechanism, (2) photons reflected from top contact metal, and (3) a residual reflection which can not be eliminated by an antireflection coating.

Compact polarization-insensitive arrayed waveguide grating based on SOI material

A compact polarization-insensitive 8x8 arrayed waveguide grating with 100GHz channel spacing at 1.55 mu m is presented on the material of silicon on insulator (SOI). Increasing the epitaxial layer thickness can reduce the birefringence of the waveguide, but the wvaeguide's bend radius also increases at the same time. We choose the SOI wafer with 3.0 mu m epitaxial layer to reduce the device's size and designed the appropriate structure of rib wave-guides to eliminate the polarization dependant wavelength shift. Compared to the other methods of eliminating the polarization dependant wavelength shift, the method is convenient and easy to control the polarization without additional etching process. The index differences between TE0 and TM0 of straight and bend waveguides are 1.4x10(-5) and 3.9x10(-5), respectively. The results showed that the polarization dependant wavelength shift is 0.1nm, and the device size is 1.5x1.0 cm(2).

Enhanced fiber Bragg grating sensor demodulation technique using cascade wavelength division multiplex couplers

An enhanced technique for interrogating fiber Bragg grating wavelength shift using cascade wavelength division multiplexer (WDM) couplers was proposed and demonstrated. Three WDM couplers which show a linear filter function over the expected wavelength range are employed and cascaded to track Bragg wavelength shifts. Compared with single WDM demodulator. sharper spectral slope is obtained and considerable linear filter range is kept. The static and dynamic strain sensor demodulation experiments demonstrated that the simple passive technique improves the sensitivity approximately two times and keeps 5nm linear demodulation range based on our devices. The cascade WDM coupler demodulation system has high scan rate which can be used to monitor fast vibration.

Effect of the implantation of fluorine on the mobility of channel electron for partially depleted SOI nMOSFET

The mobility of channel electron, for partially depleted Sol nMOSFET in this paper, decreases with the increase of implanted fluorine dose in buried oxide layer. But, the experimental results also show that it is larger for the transistor corresponding to the lowest implantation dose than no implanted fluorine in buried layer. It is explained in tern-is of a "lubricant" model. Mien fluorine atoms are implanted in the top silicon layer, the mobility is the largest. In addition, a positive shift of threshold voltage has also been observed for the transistors fabricated on the Sol wafers processed by the implantation of fluorine. The causes of all the above results are discussed.

A simulation model of body contact structure in PD SOI analogue circuit

As a solution of accurate simulation of the body effect in PD SOI analogue circuit, a simulation model of distributed body contact resistance and parasitical capacitance is presented. Based on this model, we have designed and simulated a sense amplifier that applied to V a 0.8um PD SOI 64K SRAM.

A practical package technique for FBG-based temperature independent sensor

A practical package technique for temperature independent Fiber Bragg grating sensor is proposed. A uniform strength cantilever with two FBG attached on the upper and lower surfaces was utilized as the key element. By detecting two wavelengths differential output, the applied force can be obtained and temperature effects can be eliminated. Experiment results show the sensor has linear response and output signal uctuates less than 12pm as temperature changes from -10 degrees C to 50 degrees C. The maximum thermal error is less than 0.3% of the full measurement range.

Structural optimizations of SOI-based single-mode rib waveguide bends

Effects of structure parameters on bend loss of rib silicon-on-insulator (Sol) bend waveguides have been analyzed by means of effective index method (EIM) and 2D bend loss formula. The simulation results indicate that the bend loss decreases with the increase of bend radius and waveguide width, as well as with the decrease of the step factor of the rib waveguide. Moreover, the optional structure parameters have been found when bend waveguides are single-mode.

A low power consumption thermo-optic variable optical attenuator based on SOI material

A SOI thenno-optic variable optical attenuator with U-grooves based on a multimode interference coupler principle is fabricated. The dynamic attenuation range is 0 to 29 dB; at the wavelength range between 1510 nm and 1610nm, and the maximum power consumption is only l30mW. Compared to the variable optical attenuator without U-groove, the maximum power consumption decreases more than 230mW

The effect of Fabry-Perot interference on the packaging of SOI-based optoelectronic devices

During the packaging of optoelectrome device, a problem always met is the instability of output power. The main effect causing this problem, Fabry-Perot interference, is discussed in this paper. Both theoretical analysis and experimental test are carried out and in good agreement. As an example of avoiding the disadvantage of Fabry-Perot interference, the packaging process of Silicon-on-Insulator (SOI) based Variable Optical Attenuator(VOA) is shown at last.

Calculation of Light Delay by FDTD Technique and Pade Approximation

The time delay for light transmission in a coupled microring waveguide structure is calculated from the phase shift of the transmission coefficient obtained by Pade approximation with Baker's algorithm from FDTD Output. The results show that the Pade approximation is a powerful tool for saving time in FDTD simulation.

A Smart Frequency Presetting Technique for Fast Lock-in LC-PLL Frequency Synthesizer

This paper proposes a smart frequency presetting technique for fast lock-in LC-PLL frequency synthesizer. The technique accurately presets the frequency of VCO with small initial frequency error and greatly reduces the lock-in time. It can automatically compensate preset frequency variation with process and temperature. A 2.4GHz synthesizer with 1MHz reference input was implemented in 0.35 mu m CMOS process. The chip core area is 0.4mm(2). Output frequency of VCO ranges from 2390 to 2600MHz. The measured results show that the typical lock-in time is 3 mu s. The phase noise is -112dBc/Hz at 600KHz offset from center frequency. The test chip consumes current of 22mA that includes the consumption of the I/O buffers.

High-Order Microring Filters on SOI Wafer

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When is `partial' adequate? A logic-based proof technique using partial specifications

A technique is presented for ascertaining when a (finite-state) partial process specification is adequate, in the sense of being specified enough, for contexts in which it is to be used. The method relies on the automatic generation of a modal formula from the partial specification; if the remainder of the network satisfies this formula, then any process that meets the specification is guaranteed to ensure correct behavior of the overall system. Using the results, the authors develop compositional proof rules for establishing the correctness of networks of parallel processes and illustrate their use with several examples