A non-fullerene electron acceptor based on fluorene and diketopyrrolopyrrole building blocks for solution-processable organic solar cells with an impressive open-circuit voltage

A novel solution-processable non-fullerene electron acceptor 6,6′-(5,5′-(9,9-dioctyl-9H-fluorene-2,7-diyl)bis(thiophene-5,2-diyl))bis(2,5-bis(2-ethylhexyl)-3-(thiophen-2-yl)pyrrolo[3,4-c]pyrrole-1,4(2H,5H)-dione) (DPP1) based on fluorene and diketopyrrolopyrrole conjugated moieties was designed, synthesized and fully characterized. DPP1 exhibited excellent solubility and high thermal stability which are essential for easy processing. Upon using DPP1 as an acceptor with the classical electron donor poly(3-hexylthiophene), solution processable bulk-heterojunction solar cells afforded a power conversion efficiency of 1.2% with a high open-circuit voltage (1.1 V). As per our knowledge, this value of open circuit voltage is one of the highest values reported so far for a bulk-heterojunction device using DPP1 as a non-fullerene acceptor.

Wireless Power Transfer (WPT) for electric vehicles (EVs) - present and future trends

100 year old gasoline engine technology vehicles have now become one of the major contributors of greenhouse gases. Plug-in Electric Vehicles (PEVs) have been proposed to achieve environmental friendly transportation. Even though the PEV usage is currently increasing, a technology breakthrough would be required to overcome battery related drawbacks. Although battery technology is evolving, drawbacks inherited with batteries such as; cost, size, weight, slower charging characteristic and low energy density would still be dominating constrains for development of EVs. Furthermore, PEVs have not been accepted as preferred choice by many consumers due to charging related issues. To address battery related limitations, the concept of dynamic Wireless Power Transfer (WPT) enabled EVs have been proposed in which EV is being charged while it is in motion. WPT enabled infrastructure has to be employed to achieve dynamic EV charging concept. The weight of the battery pack can be reduced as the required energy storage is lower if the vehicle can be powered wirelessly while driving. Stationary WPT charging where EV is charged wirelessly when it is stopped, is simpler than dynamic WPT in terms of design complexity. However, stationary WPT does not increase vehicle range compared to wired-PEVs. State-of-art WPT technology for future transportation is discussed in this chapter. Analysis of the WPT system and its performance indices are introduced. Modelling the WPT system using different methods such as equivalent circuit theory, two port network theory and coupled mode theory is described illustrating their own merits in Sect. 2.3. Both stationary and dynamic WPT for EV applications are illustrated in Sect. 2.4. Design challenges and optimization directions are analysed in Sect. 2.5. Adaptive tuning techniques such as adaptive impedance matching and frequency tuning are also discussed. A case study for optimizing resonator design is presented in Sect. 2.6. Achievements by the research community is introduced highlighting directions for future research.

Design of coreless PCB transformers for power and signal isolation in a modular ADC system for power quality data acquisition

Available industrial energy meters offer high accuracy and reliability, but are typically expensive and low-bandwidth, making them poorly suited to multi-sensor data acquisition schemes and power quality analysis. An alternative measurement system is proposed in this paper that is highly modular, extensible and compact. To minimise cost, the device makes use of planar coreless PCB transformers to provide galvanic isolation for both power and data. Samples from multiple acquisition devices may be concentrated by a central processor before integration with existing host control systems. This paper focusses on the practical design and implementation of planar coreless PCB transformers to facilitate the module's isolated power, clock and data signal transfer. Calculations necessary to design coreless PCB transformers, and circuits designed for the transformer's practical application in the measurement module are presented. The designed transformer and each application circuit have been experimentally verified, with test data and conclusions made applicable to coreless PCB transformers in general.

Characterisation of the cascode gate drive of power MOSFETs in clamped inductive switching applications

This thesis proposes a novel gate drive circuit to improve the switching performance of MOSFET power switches in power electronic converters. The proposed topology exploits the cascode configuration, allowing the minimisation of switching losses in the presence of practical circuit constraints, which enables efficiency and power density improvements. Switching characteristics of the new topology are investigated and key mechanisms that control the switching process are identified. Unique analysis tools and techniques are also developed to demonstrate the application of the cascode gate drive circuit for switching performance optimisation.

Development of non-intrusive monitoring for reactive switching of high voltage circuit breaker

High-voltage circuit breakers are among the most important equipments for ensuring the efficient and safe operation of an electric power system. On occasion, circuit breaker operators may wish to check whether equipment is performing satisfactorily and whether controlled switching systems are producing reliable and repeatable stress control. Monitoring of voltage and current waveforms during switching using established methods will provide information about the magnitude and frequency of voltage transients as a result of re-ignitions and restrikes. However, high frequency waveform measurement requires shutdown of circuit breaker and use of specialized equipment. Two utilities, Hydro-Québec in Canada and Powerlink Queensland in Australia, have been working on the development and application of a non-intrusive, cost-effective and flexible diagnostic system for monitoring high-voltage circuit breakers for reactive switching. The proposed diagnostic approach relies on the non-intrusive assessment of key parameters such as operating times, prestrike characteristics, re-ignition and restrike detection. Transient electromagnetic emissions have been identified as a promising means to evaluate the abovementioned parameters non-intrusively. This paper describes two complimentary methods developed concurrently by Powerlink and Hydro-Québec. Also, return of experiences on the application to capacitor bank and shunt reactor switching is presented.

A do-it-yourself (DIY) switched mode power conversion laboratory

In the education of physical sciences, the role of the laboratory cannot be overemphasised. It is the laboratory exercises which enable the student to assimilate the theoretical basis, verify the same through bench-top experiments, and internalize the subject discipline to acquire mastery of the same. However the resources essential to put together such an environment is substantial. As a result, the students go through a curriculum which is wanting in this respect. This paper presents a low cost alternative to impart such an experience to the student aimed at the subject of switched mode power conversion. The resources are based on an open source circuit simulator (Sequel) developed at IIT Mumbai, and inexpensive construction kits developed at IISc Bangalore. The Sequel programme developed by IIT Mumbai, is a circuit simulation program under linux operating system distributed free of charge. The construction kits developed at IISc Bangalore, is fully documented for anyone to assemble these circuit which minimal equipment such as soldering iron, multimeter, power supply etc. This paper puts together a simple forward dc to dc converter as a vehicle to introduce the programming under sequel to evaluate the transient performance and small signal dynamic model of the same. Bench tests on the assembled construction kit may be done by the student for study of operation, transient performance and closed loop stability margins etc.

Latency, Power and Performance Trade-offs in Network-on-Chips by Link Microarchitecture Exploration

This paper presents a power, latency and throughput trade-off study on NoCs by varying microarchitectural (e.g. pipelining) and circuit level (e.g. frequency and voltage) parameters. We change pipelining depth, operating frequency and supply voltage for 3 example NoCs - 16 node 2D Torus, Tree network and Reduced 2D Torus. We use an in-house NoC exploration framework capable of topology generation and comparison using parameterized models of Routers and links developed in SystemC. The framework utilizes interconnect power and delay models from a low-level modelling tool called Intacte[1]1. We find that increased pipelining can actually reduce latency. We also find that there exists an optimal degree of pipelining which is the most energy efficient in terms of minimizing energy-delay product.

Open-circuit potential-time transient of the magnesium anode

On interrupting polarisation, the magnesium anode exhibits a negative overshoot in potential followed by a slow recovery to a steady state value. A model has been proposed to explain the opencircuit potential-time transient in terms of a spontaneous passivation of the metal and the consequent changes in the corrosion potential. Theoretical expressions have been derived for the timedependence of the open-circuit electrode potential. Calculated, potential-time curves thus obtained are in qualitative agreement with experimental data. A possible application of this phenomenon to develop non-destructive quality control tests of Mg, Li and Al-based dry cells has been pointed out.

A new family of low-power CT/SUP 2/L circuits

A new family of low-power logic circuits, employing a multiemitter transistor input circuit and a modified complementary p-n-p n-p-n output stage, having almost the same performance as standard TTL circuits and suitable for IC use, is reported in this correspondence.

Process variability-aware statistical hybrid modeling of dynamic power dissipation in 65 nm CMOS designs

A generalized technique is proposed for modeling the effects of process variations on dynamic power by directly relating the variations in process parameters to variations in dynamic power of a digital circuit. The dynamic power of a 2-input NAND gate is characterized by mixed-mode simulations, to be used as a library element for 65mn gate length technology. The proposed methodology is demonstrated with a multiplier circuit built using the NAND gate library, by characterizing its dynamic power through Monte Carlo analysis. The statistical technique of Response. Surface Methodology (RSM) using Design of Experiments (DOE) and Least Squares Method (LSM), are employed to generate a "hybrid model" for gate power to account for simultaneous variations in multiple process parameters. We demonstrate that our hybrid model based statistical design approach results in considerable savings in the power budget of low power CMOS designs with an error of less than 1%, with significant reductions in uncertainty by atleast 6X on a normalized basis, against worst case design.

Low Power continuous time common mode sensing for common mode feedback circuits

Continuous common mode feedback (CMFB) circuits having high input impedance and low distortion are proposed. The proposed circuits are characterized for 0.18 mu m CMOS process with 1.8 V supply. Simulation results indicate that the proposed common mode detector consumes no standby power and CMFB circuit consumes 27-34% less power than previous high swing CMFB circuits.

Ultracapacitor Based Ride Through System for Control Power Supplies in High Power Converters

High power converters are used in variable speed induction motor drive applications. Riding through a short term power supply glitch is becoming an important requirement in these power converters. The power converter uses a large number of control circuit boards for its operation. The control power supply need to ensure that any glitch in the grid side does not affect any of these control circuit boards. A power supply failure of these control cards results in shut down of the entire system. The paper discusses the ride through system developed to overcome voltage sags and short duration outages at the power supply terminals of the control cards in these converters. A 240VA non-isolated, bi-directional buck-boost converter has been designed to be used along with a stack of ultracapacitors to achieve the same. A micro-controller based digital control platform made use of to achieve the control objective. The design of the ultracapacitor stack and the bidirectional converter is described the performance of the experimental set-up is evaluated.

Integrated Magnetics-Based Multisource Quality AC Power Supply

This paper proposes a method of sharing power/energy between multiple sources and multiple loads using an integrated magnetic circuit as a junction between sources and sinks. It also presents a particular use of the magnetic circuit as an ac power supply, delivering sinusoidal voltage to load irrespective of the presence of the grid, taking only active power from the grid. The proposed magnetic circuit is a three-energy-port unit, viz.: 1) power/energy from grid; 2) power energy from battery-inverter unit; and 3) power/energy delivery to the load in its particular application as quality ac power supply (QPS). The product provides sinusoidal regulated output voltage, input power-factor correction, electrical isolation between the sources and loads, low battery voltage, and control simplicity. Unlike conventional series-shunt-compensated uninterruptible power supply topologies with low battery voltage, the isolation is provided using a single magnetic circuit that results in a smaller size and lower cost. The circuit operating principles and analysis, as well as simulation and experimental results, are presented for this QPS.

In-situ power monitoring scheme and its application in dynamic voltage and threshold scaling for digital CMOS integrated circuits

An in-situ power monitoring technique for Dynamic Voltage and Threshold scaling (DVTS) systems is proposed which measures total power consumed by load circuit using sleep transistor acting as power sensor. Design details of power monitor are examined using simulation framework in UMC 90nm CMOS process. Experimental results of test chip fabricated in AMS 0.35µm CMOS process are presented. The test chip has variable activity between 0.05 and 0.5 and has PMOS VTH control through nWell contact. Maximum resolution obtained from power monitor is 0.25mV. Overhead of power monitor in terms of its power consumption is 0.244 mW (2.2% of total power of load circuit). Lastly, power monitor is used to demonstrate closed loop DVTS system. DVTS algorithm shows 46.3% power savings using in-situ power monitor.

Starting scheme for load commutated inverter-fed wound field synchronous machine using an auxiliary low-power voltage source inverter

Conventional thyristor-based load commutated inverter (LCI)-fed wound field synchronous machine operates only above a minimum speed that is necessary to develop enough back emf to ensure commutation. The drive is started and brought up to a speed of around 10-15% by a complex `dc link current pulsing' technique. During this process, the drive have problems such as pulsating torque, insufficient average starting torque, longer starting time, etc. In this regard a simple starting and low-speed operation scheme, by employing an auxiliary low-power voltage source inverter (VSI) between the LCI and the machine terminals, is presented in this study. The drive is started and brought up to a low speed of around 15% using the VSI alone with field oriented control. The complete control is then smoothly and dynamically transferred to the conventional LCI control. After the control transfer, the VSI is turned off and physically disconnected from the main circuit. The advantages of this scheme are smooth starting, complete control of torque and flux at starting and low speeds, less starting time, stable operation, etc. The voltage rating of the required VSI is very low of the order of 10-15%, whereas the current rating is dependent on the starting torque requirement of the load. The experimental results from a 15.8 hp LCI-fed wound field synchronous machine are given to demonstrate the scheme.