Modelling the nano-scale phenomena in condensed matter physics via computer-based numerical simulations

A review of the atomistic modelling of the behaviour of nano-scale structures and processes via molecular dynamics (MD) simulation method of a canonical ensemble is presented. Three areas of application in condensed matter physics are considered. We focus on the adhesive and indentation properties of the solid surfaces in nano-contacts, the nucleation and growth of nano-phase metallic and semi-conducting atomic and molecular films on supporting substrates, and the nano- and multi-scale crack propagation properties of metallic lattices. A set of simulations selected from these fields are discussed, together with a brief introduction to the methodology of the MD simulation. The pertinent inter-atomic potentials that model the energetics of the metallic and semi-conducting systems are also given.

Reliability analysis of flip chip designs via computer simulation

A flip chip component is a silicon chip mounted to a substrate with the active area facing the substrate. This paper presents the results of an investigation into the relationship between a number of important material properties and geometric parameters on the thermal-mechanical fatigue reliability of a standard flip chip design and a flip chip design with the use of microvias. Computer modeling has been used to analyze the mechanical conditions of flip chips under cyclic thermal loading where the Coffin-Manson empirical relationship has been used to predict the life time of the solder interconnects. The material properties and geometry parameters that have been investigated are the Young's modulus, the coefficient of thermal expansion (CTE) of the underfill, the out-of-plane CTE (CTEz) of the substrate, the thickness of the substrate, and the standoff height. When these parameters vary, the predicted life-times are calculated and some of the features of the results are explained. By comparing the predicted lifetimes of the two designs and the strain conditions under thermal loading, the local CTE mismatch has been found to be one of most important factors in defining the reliability of flip chips with microvias.

Safer by design: using computer simulation to predict the evacuation performance of passenger ships

When designing a new passenger ship or modifiying an existing design, how do we ensure that the proposed design is safe from an evacuation point of view? In the building and aviation industries, computer based evacuation models are being used to tackle similar issues. In these industries, the traditonal restrictive prescriptive approach to design is making way for performance based design methodologies using risk assessment and computer simulation. In the maritime industry, ship evacuation models off the promise to quickly and efficiently bring these considerations into the design phase, while the ship is "on the drawing board". This paper describes the development of evacuation models with applications to passenger ships and further discusses issues concerning data requirements and validation.

Computer Museum, School of Computing and Mathematical Sciences, University of Greenwich

Computer equipment, once viewed as leading edge, is quickly condemned as obsolete and banished to basement store rooms or rubbish bins. The magpie instincts of some of the academics and technicians at the University of Greenwich, London, preserved some such relics in cluttered offices and garages to the dismay of colleagues and partners. When the University moved into its new campus in the historic buildings of the Old Royal Naval College in the center of Greenwich, corridor space in King William Court provided an opportunity to display some of this equipment so that students could see these objects and gain a more vivid appreciation of their subject's history.

The semi-automatic parallelisation of scientific application codes using a computer aided parallelisation toolkit

The shared-memory programming model can be an effective way to achieve parallelism on shared memory parallel computers. Historically however, the lack of a programming standard using directives and the limited scalability have affected its take-up. Recent advances in hardware and software technologies have resulted in improvements to both the performance of parallel programs with compiler directives and the issue of portability with the introduction of OpenMP. In this study, the Computer Aided Parallelisation Toolkit has been extended to automatically generate OpenMP-based parallel programs with nominal user assistance. We categorize the different loop types and show how efficient directives can be placed using the toolkit's in-depth interprocedural analysis. Examples are taken from the NAS parallel benchmarks and a number of real-world application codes. This demonstrates the great potential of using the toolkit to quickly parallelise serial programs as well as the good performance achievable on up to 300 processors for hybrid message passing-directive parallelisations.

Using computer models to identify optimal conditions for flip-chip assembly and reliability

Flip-chip assembly, developed in the early 1960s, is now being positioned as a key joining technology to achieve high-density mounting of electronic components on to printed circuit boards for high-volume, low-cost products. Computer models are now being used early within the product design stage to ensure that optimal process conditions are used. These models capture the governing physics taking place during the assembly process and they can also predict relevant defects that may occur. Describes the application of computational modelling techniques that have the ability to predict a range of interacting physical phenomena associated with the manufacturing process. For example, in the flip-chip assembly process we have solder paste deposition, solder joint shape formation, heat transfer, solidification and thermal stress. Illustrates the application of modelling technology being used as part of a larger UK study aiming to establish a process route for high-volume, low-cost, sub-100-micron pitch flip-chip assembly.

Computer modelling of the reliability of flip chips with metal column bumping

Recently, research has been carried out to test a novel bumping method which omits the under bump metallurgy forming process by bonding copper columns directly onto the Al pads of the silicon dies. This bumping method could be adopted to simplify the flip chip manufacturing process, increase the productivity and achieve a higher I/O count. This paper describes an investigation of the solder joint reliability of flip-chips based on this new bumping process. Computer modelling methods are used to predict the shape of solder joints and response of flip chips to thermal cyclic loading. The accumulated plastic strain energy at the comer solder joints is used as the damage indicator. Models with a range of design parameters have been compared for their reliability. The parameters that have been investigated are the copper column height, radius and solder volume. The ranking of the relative importance of these parameters is given. For most of the results presented in the paper, the solder material has been assumed to be the lead-free 96.5Sn3.5Ag alloy but some results for 60Sn40Pb solder joints have also been presented.

A preliminary investigation of the evacuation of the WTC North Tower using computer simulation

This paper concerns a preliminary numerical simulation study of the evacuation of the World Trade Centre North Tower on 11 September 2001 using the buildingEXODUS evacuation simulation software. The analysis makes use of response time data derived from a study of survivor accounts appearing in the public domain. While exact geometric details of the building were not available for this study, the building geometry was approximated from descriptions available in the public domain. The study attempts to reproduce the events of 11 September 2001 and pursue several ‘what if’ questions concerning the evacuation. In particular, the study explores the likely outcome had a single staircase survived in tact from top to bottom.

On the persistence of computer dreams: an application framework for robust adaptive deployment

The anticipated rewards of adaptive approaches will only be fully realised when autonomic algorithms can take configuration and deployment decisions that match and exceed those of human engineers. Such decisions are typically characterised as being based on a foundation of experience and knowledge. In humans, these underpinnings are themselves founded on the ashes of failure, the exuberance of courage and (sometimes) the outrageousness of fortune. In this paper we describe an application framework that will allow the incorporation of similarly risky, error prone and downright dangerous software artefacts into live systems – without undermining the certainty of correctness at application level. We achieve this by introducing the notion of application dreaming.

The use of computer simulation for aircraft evacuation certification: a report from the VERRES project

In this paper a methodology for the application of computer simulation to the evacuation certification of aircraft is suggested. The methodology suggested here involves the use of computer simulation, historic certification data, component testing and full-scale certification trials. The proposed methodology sets out a protocol for how computer simulation should be undertaken in a certification environment and draws on experience from both the marine and building industries. Along with the suggested protocol, a phased introduction of computer models to certification is suggested. Given the sceptical nature of the aviation community regarding any certification methodology change in general, this would involve as a first step the use of computer simulation in conjunction with full-scale testing. The computer model would be used to reproduce a probability distribution of likely aircraft performance under current certification conditions and in addition, several other more challenging scenarios could be developed. The combination of full-scale trial, computer simulation (and if necessary component testing) would provide better insight into the actual performance capabilities of the aircraft by generating a performance probability distribution or performance envelope rather than a single datum. Once further confidence in the technique is established, the second step would only involve computer simulation and component testing. This would only be contemplated after sufficient experience and confidence in the use of computer models have been developed. The third step in the adoption of computer simulation for certification would involve the introduction of several scenarios based on for example exit availability instructed by accident analysis. The final step would be the introduction of more realistic accident scenarios into the certification process. This would require the continued development of aircraft evacuation modelling technology to include additional behavioural features common in real accident scenarios.

Computer simulation of VLTA evacuation performance: a report from the VERRES project

This paper reports on research work undertaken for the European Commission funded study GMA2/2000/32039 Very Large Transport Aircraft (VLTA) Emergency Requirements Research Evacuation Study (VERRES). A particular focus was on evacuation issues with a detailed study of evacuation performance using computer models being undertaken as part of Work Package 2. This paper describes this work and investigates the use of internal stairs during evacuation using computer simulation.

Proposed methodology for the use of computer simulation to enhance aircraft evacuation certification

In this paper a methodology for the application of computer simulation to evacuation certification of aircraft is suggested. This involves the use of computer simulation, historic certification data, component testing, and full-scale certification trials. The methodology sets out a framework for how computer simulation should be undertaken in a certification environment and draws on experience from both the marine and building industries. In addition, a phased introduction of computer models to certification is suggested. This involves as a first step the use of computer simulation in conjunction with full-scale testing. The combination of full-scale trial, computer simulation (and if necessary component testing) provides better insight into aircraft evacuation performance capabilities by generating a performance probability distribution rather than a single datum. Once further confidence in the technique is established the requirement for the full-scale demonstration could be dropped. The second step in the adoption of computer simulation for certification involves the introduction of several scenarios based on, for example, exit availability, instructed by accident analysis. The final step would be the introduction of more realistic accident scenarios. This would require the continued development of aircraft evacuation modeling technology to include additional behavioral features common in real accident scenarios.

A study of user requirements for COTS: computer off the shelf software solutions

[This abstract is based on the authors' abstract.]Three new standards to be applied when adopting commercial computer off-the-shelf (COTS) software solutions are discussed. The first standard is for a COTS software life cycle, the second for a software solution user requirements life cycle, and the third is a checklist to help in completing the requirements. The standards are based on recent major COTS software solution implementations.