965 resultados para Layout (Printing)


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With the rapid development of photovoltaic system installations and increased number of grid connected power systems, it has become imperative to develop an efficient grid interfacing instrumentation suitable for photovoltaic systems ensuring maximum power transfer. The losses in the power converter play an important role in the overall efficiency of a PV system. Chain cell converter is considered to be efficient as compared to PWM converters due to lower switching losses, modularized circuit layout, reduced voltage rating of the converter switches, reduced EMI. The structure of separate dc sources in chain cell converter is well suited for photovoltaic systems as there will b several separate PV modules in the PV array which can act as an individual dc source. In this work, a single phase multilevel chain cell converter is used to interface the photovoltaic array to a single phase grid at a frequency of 50Hz. Control algorithms are developed for efficient interfacing of the PV system with grid and isolating the PV system from grid under faulty conditions. Digital signal processor TMS320F 2812 is used to implement the control algorithms developed and for the generation of other control signals.

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Preferential cleavage of active genes by DNase I has been correlated with a structurally altered conformation of DNA at the hypersensitive site in chromatin. To have a better understanding of the structural requirements for gene activation as probed by DNase I action, digestability by DNase I of synthetic polynucleotides having the ability to adopt B and non-B conformation (like Z-form) was studied which indicated a marked higher digestability of the B-form of DNA. Left handed Z form present within a natural sequence in supercoiled plasmid also showed marked resistance towards DNase I digestion. We show that alternating purine-pyrimidine sequences adopting Z-conformation exhibit DNAse I foot printing even in a protein free system. The logical deductions from the results indicate that 1) altered structure like Z-DNA is not a favourable substrate for DNase I, 2) both the ends of the alternating purine-pyrimidine insert showed hypersensitivity, 3) B-form with a minor groove of 12-13 A is a more favourable substrate for DNase I than an altered structure, 4) any structure of DNA deviating largely from B form with a capacity to flip over to the B-form are potential targets for the DNase I enzymic probes in naked DNA.

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Home Economics Classrooms as Part of Developing the Environment Housing Activities and Curriculums Defining Change --- The aim of the research project was to develop home economics classrooms to be flexible and versatile learning environments where household activities might be practiced according to the curriculum in different social networking situations. The research is based on the socio-cultural approach, where the functionality of the learning environment is studied specifically from an interactive learning viewpoint. The social framework is a natural starting point in home economics teaching because of the group work in classrooms. The social nature of learning thus becomes a significant part of the learning process. The study considers learning as experience based, holistic and context bound. The learning environment, i.e. home economics classrooms and the material tools there, plays a significant role in developing students skills to manage everyday life. --- The first research task was to analyze the historical development of household activities. The second research task was to develop and test criteria for functional home economics classrooms in planning both the learning environment and the students activities during lessons. The third research task was to evaluate how different professionals (commissioners, planners and teachers) use the criteria as a tool. The research consists of three parts. The first contains a historical analysis of how social changes have created tension between traditional household classrooms and new activities in homes. The historical analysis is based on housing research, regulations and instructions. For this purpose a new theoretical concept, the tension arch, was introduced. This helped in recognizing and solving problems in students activities and in developing innovations. The functionality criteria for home economics classrooms were developed based on this concept. These include technical (health, safety and technical factors), functional (ergonomic, ecological, aesthetic and economic factors) and behavioural (cooperation and interaction skills and communication technologies) criteria. --- The second part discusses how the criteria were used in renovating school buildings. Empirical data was collected from two separate schools where the activities during lessons were recorded both before and after classrooms were renovated. An analysis of both environments based on video recordings was conducted. The previously created criteria were made use of, and problematic points in functionality looked for particularly from a social interactive viewpoint. The results show that the criteria were used as a planning tool. The criteria facilitated layout and equipment solutions that support both curriculum and learning in home economics classrooms taking into consideration cooperation and interaction in the classroom. With the help of the criteria the home economics classrooms changed from closed and complicated space into integrated and open spaces where the flexibility and versatility of the learning environment was emphasized. The teacher became a facilitator and counselor instead a classroom controller. --- The third part analyses the discussions in planning meetings. These were recorded and an analysis was conducted of how the criteria and research results were used in the planning process of new home economics classrooms. The planning process was multivoiced, i.e. actors from different interest groups took part. All the previously created criteria (technical, functional and behavioural) emerged in the discussions and some of them were used as planning tools. Planning meetings turned into planning studios where boundaries between organizations were ignored and the physical learning environments were developed together with experts. The planning studios resulted in multivoiced planning which showed characteristics of collaborative and participating planning as well as producing common knowledge and shared expertise. --- KEY WORDS: physical learning environment, socio-cultural approach, tension arch, boundary crossing, collaborative planning.

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This study is a pragmatic description of the evolution of the genre of English witchcraft pamphlets from the mid-sixteenth century to the end of the seventeenth century. Witchcraft pamphlets were produced for a new kind of readership semi-literate, uneducated masses and the central hypothesis of this study is that publishing for the masses entailed rethinking the ways of writing and printing texts. Analysis of the use of typographical variation and illustrations indicates how printers and publishers catered to the tastes and expectations of this new audience. Analysis of the language of witchcraft pamphlets shows how pamphlet writers took into account the new readership by transforming formal written source materials trial proceedings into more immediate ways of writing. The material for this study comes from the Corpus of Early Modern English Witchcraft Pamphlets, which has been compiled by the author. The multidisciplinary analysis incorporates both visual and linguistic aspects of the texts, with methodologies and theoretical insights adopted eclectically from historical pragmatics, genre studies, book history, corpus linguistics, systemic functional linguistics and cognitive psychology. The findings are anchored in the socio-historical context of early modern publishing, reading, literacy and witchcraft beliefs. The study shows not only how consideration of a new audience by both authors and printers influenced the development of a genre, but also the value of combining visual and linguistic features in pragmatic analyses of texts.

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Thermonuclear fusion is a sustainable energy solution, in which energy is produced using similar processes as in the sun. In this technology hydrogen isotopes are fused to gain energy and consequently to produce electricity. In a fusion reactor hydrogen isotopes are confined by magnetic fields as ionized gas, the plasma. Since the core plasma is millions of degrees hot, there are special needs for the plasma-facing materials. Moreover, in the plasma the fusion of hydrogen isotopes leads to the production of high energetic neutrons which sets demanding abilities for the structural materials of the reactor. This thesis investigates the irradiation response of materials to be used in future fusion reactors. Interactions of the plasma with the reactor wall leads to the removal of surface atoms, migration of them, and formation of co-deposited layers such as tungsten carbide. Sputtering of tungsten carbide and deuterium trapping in tungsten carbide was investigated in this thesis. As the second topic the primary interaction of the neutrons in the structural material steel was examined. As model materials for steel iron chromium and iron nickel were used. This study was performed theoretically by the means of computer simulations on the atomic level. In contrast to previous studies in the field, in which simulations were limited to pure elements, in this work more complex materials were used, i.e. they were multi-elemental including two or more atom species. The results of this thesis are in the microscale. One of the results is a catalogue of atom species, which were removed from tungsten carbide by the plasma. Another result is e.g. the atomic distributions of defects in iron chromium caused by the energetic neutrons. These microscopic results are used in data bases for multiscale modelling of fusion reactor materials, which has the aim to explain the macroscopic degradation in the materials. This thesis is therefore a relevant contribution to investigate the connection of microscopic and macroscopic radiation effects, which is one objective in fusion reactor materials research.

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Atomic layer deposition (ALD) is a method to deposit thin films from gaseous precursors to the substrate layer-by-layer so that the film thickness can be tailored with atomic layer accuracy. Film tailoring is even further emphasized with selective-area ALD which enables the film growth to be controlled also on the substrate surface. Selective-area ALD allows the decrease of a process steps in preparing thin film devices. This can be of a great technological importance when the ALD films become into wider use in different applications. Selective-area ALD can be achieved by passivation or activation of a surface. In this work ALD growth was prevented by octadecyltrimethoxysilane, octadecyltrichlorosilane and 1-dodecanethiol SAMs, and by PMMA (polymethyl methacrylate) and PVP (poly(vinyl pyrrolidone) polymer films. SAMs were prepared from vapor phase and by microcontact printing, and polymer films were spin coated. Microcontact printing created patterned SAMs at once. The SAMs prepared from vapor phase and the polymer mask layers were patterned by UV lithography or lift-off process so that after preparation of a continuous mask layer selected areas of them were removed. On these areas the ALD film was deposited selectively. SAMs and polymer films prevented the growth in several ALD processes such as iridium, ruthenium, platinum, TiO2 and polyimide so that the ALD films did grow only on areas without SAM or polymer mask layer. PMMA and PVP films also protected the surface against Al2O3 and ZrO2 growth. Activation of the surface for ALD of ruthenium was achieved by preparing a RuOX layer by microcontact printing. At low temperatures the RuCp2-O2 process nucleated only on this oxidative activation layer but not on bare silicon.

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A simple and efficient algorithm for the bandwidth reduction of sparse symmetric matrices is proposed. It involves column-row permutations and is well-suited to map onto the linear array topology of the SIMD architectures. The efficiency of the algorithm is compared with the other existing algorithms. The interconnectivity and the memory requirement of the linear array are discussed and the complexity of its layout area is derived. The parallel version of the algorithm mapped onto the linear array is then introduced and is explained with the help of an example. The optimality of the parallel algorithm is proved by deriving the time complexities of the algorithm on a single processor and the linear array.

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This study investigates the process of producing interactivity in a converged media environment. The study asks whether more media convergence equals more interactivity. The research object is approached through semi-structured interviews of prominent decision makers within the Finnish media. The main focus of the study are the three big ones of the traditional media, radio, television and the printing press, and their ability to adapt to the changing environment. The study develops theoretical models for the analysis of interactive features and convergence. Case-studies are formed from the interview data and they are evaluated against the models. As a result the cases arc plotted and compared on a four-fold table. The cases are Radio Rock, NRJ, Biu Brother, Television Chat, Olivia and Sanoma News. It is found out that the theoretical models can accurately forecast the results of the case studies. The models are also able to distinguish different aspects of both interactivity and convergence so that a case, which at a first glance seems not to be very interactive is in the end found out to receive second highest scores on the analysis. The highest scores are received by Big Brother and Sanoma News. Through the theory and the analysis of the research data it is found out that the concepts of interactivity and convergence arc intimately intertwined and very hard in many cases to separate from each other. Hence the answer to the main question of this study is yes, convergence does promote interactivity and audience participation. The main theoretical background for the analysis of interactivity follows the work of Came Fleeter, Spiro Kiousis and Sally McMillan. Heeler's six-dimensional definition of interactivity is used as the basis for operationalizing interactivity. The actor-network theory is used as the main theoretical framework to analyze convergence. The definition and operationalization of the actor-network theory into a model of convergence follows the work of Michel Callon. Bruno Latour and especially John Law and Felix Stalder.

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A specific protein exhibiting immunological cross-reactivity with chicken riboflavin carrier protein has been purified to homogeneity from human amniotic fluid by use of ion-exchange and affinity chromatography. The protein is similar to its avian counterpart in terms of molecular size, distribution of 125I-labelled tryptic peptides during finger printing, and preferential binding to riboflavin. Immunologically, they are homologous since most of the monoclonal antibodies raised against the avian protein cross-react with the purified human vitamin carrier.

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In this paper we propose a new method of data handling for web servers. We call this method Network Aware Buffering and Caching (NABC for short). NABC facilitates reduction of data copies in web server's data sending path, by doing three things: (1) Layout the data in main memory in a way that protocol processing can be done without data copies (2) Keep a unified cache of data in kernel and ensure safe access to it by various processes and kernel and (3) Pass only the necessary meta data between processes so that bulk data handling time spent during IPC can be reduced. We realize NABC by implementing a set of system calls and an user library. The end product of the implementation is a set of APIs specifically designed for use by the web servers. We port an in house web server called SWEET, to NABC APIs and evaluate performance using a range of workloads both simulated and real. The results show a very impressive gain of 12% to 21% in throughput for static file serving and 1.6 to 4 times gain in throughput for lightweight dynamic content serving for a server using NABC APIs over the one using UNIX APIs.

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We describe here a photoelectron spectroscopy beamline installed on Indus-1 storage ring. Initially we give a brief description of optical and mechanical layout of beam-line. The beamline optics was designed to cover energy range from 10 eV to 200 eV and it consists of a pre-focusing mirror, a toroidal grating monochromator and a post-focusing mirror. We then discuss indigenously developed ultra high vacuum compatible work station to carry out angle integrated photoemission experiments. The beamline has been successfully commissioned and photoemission measurements on a variety of standard samples are presented.

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Metal stencils are well known in electronics printing application such as for dispensing solder paste for surface mounting, printing embedded passive elements in multilayer structures, etc. For microprinting applications using stencils, the print quality depends on the smoothness of the stencil aperture and its dimensional accuracy, which in turn are invariably related to the method used to manufacture the stencils. In this paper, fabrication of metal stencils using a photo-defined electrically assisted etching method is described. Apertures in the stencil were made in neutral electrolyte using three different types of impressed current, namely, dc, pulsed dc, and periodic pulse reverse (PPR). Dimensional accuracy and wall smoothness of the etched apertures in each of the current waveforms were compared. Finally, paste transfer efficiency of the stencil obtained using PPR was calculated and compared with those of a laser-cut electropolished stencil. It is observed that the stencil fabricated using current in PPR waveform has better dimensional accuracy and aperture wall smoothness than those obtained with dc and pulsed dc. From the paste transfer efficiency experiment, it is concluded that photo-defined electrically assisted etching method can provide an alternate route for fabrication of metal stencils for future microelectronics printing applications.

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Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and lower energy consumption. The memory architecture of the embedded system strongly influences critical system design objectives like area, power and performance. Hence the embedded system designer performs a complete memory architecture exploration to custom design a memory architecture for a given set of applications. Further, the designer would be interested in multiple optimal design points to address various market segments. However, tight time-to-market constraints enforces short design cycle time. In this paper we address the multi-level multi-objective memory architecture exploration problem through a combination of exhaustive-search based memory exploration at the outer level and a two step based integrated data layout for SPRAM-Cache based architectures at the inner level. We present a two step integrated approach for data layout for SPRAM-Cache based hybrid architectures with the first step as data-partitioning that partitions data between SPRAM and Cache, and the second step is the cache conscious data layout. We formulate the cache-conscious data layout as a graph partitioning problem and show that our approach gives up to 34% improvement over an existing approach and also optimizes the off-chip memory address space. We experimented our approach with 3 embedded multimedia applications and our approach explores several hundred memory configurations for each application, yielding several optimal design points in a few hours of computation on a standard desktop.

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A low-power frequency multiplication technique, developed for ZigBee (IEEE 802.15.4) like applications is presented. We have provided an estimate for the power consumption for a given output voltage swing using our technique. The advantages and disadvantages which determine the application areas of the technique are discussed. The issues related to design, layout and process variation are also addressed. Finally, a design is presented for operation in 2.405-2.485-GHz band of ZigBee receiver. SpectreRF simulations show 30% improvement in efficiency for our circuit with regard to conversion of DC bias current to output amplitude, against a LC-VCO. To establish the low-power credentials, we have compared our circuit with an existing technique; our circuit performs better with just 1/3 of total current from supply, and uses one inductor as against three in the latter case. A test chip was implemented in UMC 0.13-mum RF process with spiral on-chip inductors and MIM (metal-insulator-metal) capacitor option.

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Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and lower energy consumption. The memory architecture of the embedded system strongly influences these parameters. Hence the embedded system designer performs a complete memory architecture exploration. This problem is a multi-objective optimization problem and can be tackled as a two-level optimization problem. The outer level explores various memory architecture while the inner level explores placement of data sections (data layout problem) to minimize memory stalls. Further, the designer would be interested in multiple optimal design points to address various market segments. However, tight time-to-market constraints enforces short design cycle time. In this paper we address the multi-level multi-objective memory architecture exploration problem through a combination of Multi-objective Genetic Algorithm (Memory Architecture exploration) and an efficient heuristic data placement algorithm. At the outer level the memory architecture exploration is done by picking memory modules directly from a ASIC memory Library. This helps in performing the memory architecture exploration in a integrated framework, where the memory allocation, memory exploration and data layout works in a tightly coupled way to yield optimal design points with respect to area, power and performance. We experimented our approach for 3 embedded applications and our approach explores several thousand memory architecture for each application, yielding a few hundred optimal design points in a few hours of computation time on a standard desktop.