Architecture of Run-time Reconfigurable Channel Decoder

Modern wireline and wireless communication devices are multimode and multifunctional communication devices. In order to support multiple standards on a single platform, it is necessary to develop a reconfigurable architecture that can provide the required flexibility and performance. The Channel decoder is one of the most compute intensive and essential elements of any communication system. Most of the standards require a reconfigurable Channel decoder that is capable of performing Viterbi decoding and Turbo decoding. Furthermore, the Channel decoder needs to support different configurations of Viterbi and Turbo decoders. In this paper, we propose a reconfigurable Channel decoder that can be reconfigured for standards such as WCDMA, CDMA2000, IEEE802.11, DAB, DVB and GSM. Different parameters like code rate, constraint length, polynomials and truncation length can be configured to map any of the above mentioned standards. A multiprocessor approach has been followed to provide higher throughput and scalable power consumption in various configurations of the reconfigurable Viterbi decoder and Turbo decoder. We have proposed A Hybrid register exchange approach for multiprocessor architecture to minimize power consumption.

Influence of Gate Corrugations on the Performance of Thin-Film Transistors

This letter investigates the influence of a corrugated gate on the transfer characteristics of thin-film transistors. Corrugations that run parallel to the length of the channel from source to drain are patterned on the gate. The author finds that these corrugations result in higher currents as compared to conventional planar-gate transistors.

Accelerating Numerical Linear Algebra Kernels on a Scalable Run Time Reconfigurable Platform

Numerical Linear Algebra (NLA) kernels are at the heart of all computational problems. These kernels require hardware acceleration for increased throughput. NLA Solvers for dense and sparse matrices differ in the way the matrices are stored and operated upon although they exhibit similar computational properties. While ASIC solutions for NLA Solvers can deliver high performance, they are not scalable, and hence are not commercially viable. In this paper, we show how NLA kernels can be accelerated on REDEFINE, a scalable runtime reconfigurable hardware platform. Compared to a software implementation, Direct Solver (Modified Faddeev's algorithm) on REDEFINE shows a 29X improvement on an average and Iterative Solver (Conjugate Gradient algorithm) shows a 15-20% improvement. We further show that solution on REDEFINE is scalable over larger problem sizes without any notable degradation in performance.

Apparatus and method for heat-run test on high-power PWM converters with low energy expenditure

Before installation, a voltage source converter is usually subjected to heat-run test to verify its thermal design and performance under load. For heat-run test, the converter needs to be operated at rated voltage and rated current for a substantial length of time. Hence, such tests consume huge amount of energy in case of high-power converters. Also, the capacities of the source and loads available in the research and development (R&D) centre or the production facility could be inadequate to conduct such tests. This paper proposes a method to conduct heat-run tests on high-power, pulse width modulated (PWM) converters with low energy consumption. The experimental set-up consists of the converter under test and another converter (of similar or higher rating), both connected in parallel on the ac side and open on the dc side. Vector-control or synchronous reference frame control is employed to control the converters such that one draws certain amount of reactive power and the other supplies the same; only the system losses are drawn from the mains. The performance of the controller is validated through simulation and experiments. Experimental results, pertaining to heat-run tests on a high-power PWM converter, are presented at power levels of 25 kVA to 150 kVA.

Elastic Resources Framework in IaaS, preserving performance SLAs

Elasticity in cloud systems provides the flexibility to acquire and relinquish computing resources on demand. However, in current virtualized systems resource allocation is mostly static. Resources are allocated during VM instantiation and any change in workload leading to significant increase or decrease in resources is handled by VM migration. Hence, cloud users tend to characterize their workloads at a coarse grained level which potentially leads to under-utilized VM resources or under performing application. A more flexible and adaptive resource allocation mechanism would benefit variable workloads, such as those characterized by web servers. In this paper, we present an elastic resources framework for IaaS cloud layer that addresses this need. The framework provisions for application workload forecasting engine, that predicts at run-time the expected demand, which is input to the resource manager to modulate resource allocation based on the predicted demand. Based on the prediction errors, resources can be over-allocated or under-allocated as compared to the actual demand made by the application. Over-allocation leads to unused resources and under allocation could cause under performance. To strike a good trade-off between over-allocation and under-performance we derive an excess cost model. In this model excess resources allocated are captured as over-allocation cost and under-allocation is captured as a penalty cost for violating application service level agreement (SLA). Confidence interval for predicted workload is used to minimize this excess cost with minimal effect on SLA violations. An example case-study for an academic institute web server workload is presented. Using the confidence interval to minimize excess cost, we achieve significant reduction in resource allocation requirement while restricting application SLA violations to below 2-3%.

The development of aerodynamic performance measurements in a transient test facility

Transient test facilities offer the potential for the simultaneous study of turbine aerodynamic performance, unsteady flow phenomena and the heat transfer characteristics of a turbine stage. This paper describes the development of aerodynamic performance measurement techniques in the Oxford Rotor Facility (ORF). The solutions to the technological issues involved with transient testing presented in this paper are expected to achieve levels of precision uncertainty comparable with traditional steady flow test rigs. The theoretical background to the measurement of aerodynamic performance is presented together with a comprehensive pre-test uncertainty analysis. The instrumentation scheme for the measurement of stage mass flow rate is discussed in detail, the measurements of shaft power, total inlet enthalpy, and stage pressure ratio are also outlined. The current working section features a 62% scale, 1-1/2 stage, high-pressure shroudless transonic turbine. The required inlet flow conditions are provided by an Isentropic Light Piston Tunnel (ILPT) with a quasi-steady state run time of approximately 70ms. The testing is conducted at engine representative specific speed, pressure ratio, gas-to-wall temperature ratio, Mach number and Reynolds number.

Modification of a poly(methyl methacrylate) injection-molded microchip and its use for high performance analysis of DNA

Inexpensive and permanently modified poly(methyl methacrylate)(PMMA) microchips were fabricated by an injection-molding process. A novel sealing method for plastic microchips at room temperature was introduced. Run-to-run and chip-to-chip reproducibility was good, with relative standard deviation values between 1-3% for the run-to-run and less than 2.1% for the chip-to-chip comparisons. Acrylonitrile-butadiene-styrene (ABS) was used as an additive in PMMA substrates. The proportions of PMMA and ABS were optimized. ABS may be considered as a modifier, which obviously improved some characteristics of the microchip, such as the hydrophilicity and the electro-osmotic flow (EOF). The detection limit of Rhodamine 6G dye for the modified microchip on the home-made microchip analyzer showed a dramatic 100-fold improvement over that for the unmodified PMMA chip. A detection limit of the order of 10(-20) mole has been achieved for each injected phiX-174/HaeIII DNA fragment with the baseline separation between 271 and 281 bp, and fast separation of 11 DNA restriction fragments within 180 seconds. Analysis of a PCR product from the tobacco ACT gene was performed on the modified microchip as an application example.

On the Performance of Polynomial-time CLIQUE Approximation Algorithms on Very Large Graphs

The performance of a randomized version of the subgraph-exclusion algorithm (called Ramsey) for CLIQUE by Boppana and Halldorsson is studied on very large graphs. We compare the performance of this algorithm with the performance of two common heuristic algorithms, the greedy heuristic and a version of simulated annealing. These algorithms are tested on graphs with up to 10,000 vertices on a workstation and graphs as large as 70,000 vertices on a Connection Machine. Our implementations establish the ability to run clique approximation algorithms on very large graphs. We test our implementations on a variety of different graphs. Our conclusions indicate that on randomly generated graphs minor changes to the distribution can cause dramatic changes in the performance of the heuristic algorithms. The Ramsey algorithm, while not as good as the others for the most common distributions, seems more robust and provides a more even overall performance. In general, and especially on deterministically generated graphs, a combination of simulated annealing with either the Ramsey algorithm or the greedy heuristic seems to perform best. This combined algorithm works particularly well on large Keller and Hamming graphs and has a competitive overall performance on the DIMACS benchmark graphs.

Investigation into the performance of turbulence models for fluid flow and heat transfer phenomena in electronic applications

Computational Fluid Dynamics (CFD) is gradually becoming a powerful and almost essential tool for the design, development and optimization of engineering applications. However the mathematical modelling of the erratic turbulent motion remains the key issue when tackling such flow phenomena. The reliability of CFD analysis depends heavily on the turbulence model employed together with the wall functions implemented. In order to resolve the abrupt changes in the turbulent energy and other parameters situated at near wall regions a particularly fine mesh is necessary which inevitably increases the computer storage and run-time requirements. Turbulence modelling can be considered to be one of the three key elements in CFD. Precise mathematical theories have evolved for the other two key elements, grid generation and algorithm development. The principal objective of turbulence modelling is to enhance computational procedures of efficient accuracy to reproduce the main structures of three dimensional fluid flows. The flow within an electronic system can be characterized as being in a transitional state due to the low velocities and relatively small dimensions encountered. This paper presents simulated CFD results for an investigation into the predictive capability of turbulence models when considering both fluid flow and heat transfer phenomena. Also a new two-layer hybrid kε / kl turbulence model for electronic application areas will be presented which holds the advantages of being cheap in terms of the computational mesh required and is also economical with regards to run-time.

Using EMGs and kinematics data to study the take-off technique of experts and novices for a pole vaulting short run-up educational exercise

This study attempts to characterise the electromyographic activity and kinematics exhibited during the performance of take-off for a pole vaulting short run-up educational exercise, for different expertise levels. Two groups (experts and novices) participated in this study. Both groups were asked to execute their take-off technique for that specific exercise. Among the kinematics variables studied, the knee, hip and ankle angles and the hip and knee angular velocities were significantly different. There were also significant differences in the EMG variables, especially in terms of (i) biceps femoris and gastrocnemius lateralis activity at touchdown and (ii) vastus lateralis and gastrocnemius lateralis activity during take-off. During touchdown, the experts tended to increase the stiffness of the take-off leg to decrease braking. Novices exhibited less stiffness in the take-off leg due to their tendency to maintain a tighter knee angle. Novices also transferred less energy forward during take-off due to lack of contraction in the vastus lateralis, which is known to contribute to forward energy transfers. This study highlights the differences in both groups in terms of muscular and angular control according to the studied variables. Such studies of pole vaulting could be useful to help novices to learn expert's technique.

Sentinel-3 Mission Performance Centre: Ensuring a high-quality altimetric dataset

Sentinel-3A is scheduled for launch in Oct. 2015, with Sentinel-3B to follow 18 months later. Together these missions are to take oceanographic remote-sensing into a new operational realm. To achieve this a large number of processing, calibration and validation tasks have to be applied to their data in order to assess for quality, absolute bias, short-term changes and long-term drifts. ESA has funded the Sentinel-3 Mission Performance Centre (S3MPC) to carry out this evaluation on behalf of ESA and EUMETSAT. The S3MPC is run by a consortium led by ACRI [1] and this paper describes the work on the calibration/validation (cal/val) of the Surface Topography Mission (STM), which is co-ordinated by CLS and PML.

High-performance size-exclusion chromatography of peptides

Gel filtration on soft gels has been employed for over 40 years for the separation, desalting and molecular weight estimation of peptides and proteins. Technical improvements have given rise to high-performance size-exclusion chromatography (HPSEC) on rigid supports, giving more rapid run times and increased resolution. Initially, these packings were more suitable for the separation of proteins than of peptides, but supports that operate in the fractionation range

High-performance FPGA implementation of DES using a novel method for implementing the key schedule

A generic, parameterisable key scheduling core is presented, which can be utilised in pipelinable private-key encryption algorithms. The data encryption standard (DES) algorithm, which lends itself readily to pipelining, is utilised to exemplify this novel key scheduling method and the broader applicability of the method to other encryption algorithms is illustrated. The DES design is implemented on Xilinx Virtex FPGA technology. Utilising the novel method, a 16-stage pipelined DES design is achieved, which can run at an encryption rate of 3.87 Gbit/s. This result is among the fastest hardware implementations and is a factor 28 times faster than software implementations.

Investigating the use of compliant webs in the damage-tolerant design of stiffener run-outs

In this work, the use of a compliant web design for improved damage tolerance in stiffener run-outs is investigated. Firstly, a numerical study that incorporates the possibility of debonding and delamination (using VCCT) is used to select a favourable compliant run-out configuration. Then, three different configurations are compared to establish the merits of the compliant design: a baseline configuration, a configuration with optimised tapering and the selected compliant configuration. The performance of these configurations, in terms of strength and damage tolerance, was compared numerically using a parametric finite element analysis. The energy release rates for debonding and delamination, for different crack lengths across the specimen width, were used for this comparison. The three configurations were subsequently manufactured and tested. In order to monitor the failure process, acoustic emission (AE) equipment was used and proved valuable in the detection and analysis of failure. The predicted failure loads, based on the energy release rates, showed good agreement with the experiments, particularly when the distribution of energy release rate across the width of the specimen was taken into account. As predicted numerically, the compliant configuration failed by debonding and showed improved damage tolerance compared to the baseline and tapered stiffener run-outs.