Accelerating Numerical Linear Algebra Kernels on a Scalable Run Time Reconfigurable Platform


Autoria(s): Biswas, P; Narayan, R; Nandy, SK; Alle, Mythri; Varadarajan, K; Mondal, R; Udupa, PP
Data(s)

16/09/2010

Resumo

Numerical Linear Algebra (NLA) kernels are at the heart of all computational problems. These kernels require hardware acceleration for increased throughput. NLA Solvers for dense and sparse matrices differ in the way the matrices are stored and operated upon although they exhibit similar computational properties. While ASIC solutions for NLA Solvers can deliver high performance, they are not scalable, and hence are not commercially viable. In this paper, we show how NLA kernels can be accelerated on REDEFINE, a scalable runtime reconfigurable hardware platform. Compared to a software implementation, Direct Solver (Modified Faddeev's algorithm) on REDEFINE shows a 29X improvement on an average and Iterative Solver (Conjugate Gradient algorithm) shows a 15-20% improvement. We further show that solution on REDEFINE is scalable over larger problem sizes without any notable degradation in performance.

Formato

application/pdf

Identificador

http://eprints.iisc.ernet.in/42918/1/Accelerating_Numerical.pdf

Biswas, P and Narayan, R and Nandy, SK and Alle, Mythri and Varadarajan, K and Mondal, R and Udupa, PP (2010) Accelerating Numerical Linear Algebra Kernels on a Scalable Run Time Reconfigurable Platform. In: 2010 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 5-7 July 2010, Lixouri, Kefalonia.

Publicador

IEEE

Relação

http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5572764

http://eprints.iisc.ernet.in/42918/

Palavras-Chave #Others
Tipo

Conference Paper

PeerReviewed