基于QNX实时系统的行为辅助机器人控制系统

论文设计研制了行为辅助机器人验证平台,以此平台为基础可以针对行为辅助机器人进行力控制研究。针对机器人力控制的实际要求,设计了行为辅助机器人柔性关节结构,辨识了系统参数。基于QNX实时操作系统设计了控制系统软件。机器人控制系统软件主要包括传感器数据采集和控制算法两部分,可以满足柔性关节控制需求。

开源RTOS T-Kernel在Blackfin处理器上的移植

随着嵌入式计算技术的飞速发展,多种功能强大的微处理器和相应嵌入式操作系统也相继问世。选择合适的嵌入式操作系统和处理器平台进行移植成为嵌入式开发的重要技术环节。本文介绍了开源嵌入式实时操作系统RTOS(Real Time Operating System)T-Kernel和Blackfin(BF)533处理器及其开发环境VisualDSP++4.5Environment,给出了中断管理、任务切换和系统调用入口三个模块的移植方法,并讨论了相应的系统稳定性和实时性测试方法。日本T-Engine组织推出的T-Kernel RTOS拥有高实时性、小体积的内核,并强调对底层处理器全面封装;ADI Blackfin系列微处理器同时具有DSP和MCU的特点,非常适合于移植RTOS。因此T-Kernel在BF533上的移植是一个典型的开发应用实例,其移植分析方法对于其他嵌入式RTOS移植也具有参考价值。

Adapting mode switches into the hierarchical scheduling

Mode switches are used to partition the system’s behavior into different modes to reduce the complexity of large embedded systems. Such systems operate in multiple modes in which each one corresponds to a specific application scenario; these are called Multi-Mode Systems (MMS). A different piece of software is normally executed for each mode. At any given time, the system can be in one of the predefined modes and then be switched to another as a result of a certain condition. A mode switch mechanism (or mode change protocol) is used to shift the system from one mode to another at run-time. In this thesis we have used a hierarchical scheduling framework to implement a multi-mode system called Multi-Mode Hierarchical Scheduling Framework (MMHSF). A two-level Hierarchical Scheduling Framework (HSF) has already been implemented in an open source real-time operating system, FreeRTOS, to support temporal isolation among real-time components. The main contribution of this thesis is the extension of the HSF featuring a multimode feature with an emphasis on making minimal changes in the underlying operating system (FreeRTOS) and its HSF implementation. Our implementation uses fixed-priority preemptive scheduling at both local and global scheduling levels and idling periodic servers. It also now supports different modes of the system which can be switched at run-time. Each subsystem and task exhibit different timing attributes according to mode, and upon a Mode Change Request (MCR) the task-set and timing interfaces of the entire system (including subsystems and tasks) undergo a change. A Mode Change Protocol specifies precisely how the system-mode will be changed. However, an application may not only need to change a mode but also a different mode change protocol semantic. For example, the mode change from normal to shutdown can allow all the tasks to be completed before the mode itself is changed, while changing a mode from normal to emergency may require aborting all tasks instantly. In our work, both the system mode and the mode change protocol can be changed at run-time. We have implemented three different mode change protocols to switch from one mode to another: the Suspend/resume protocol, the Abort protocol, and the Complete protocol. These protocols increase the flexibility of the system, allowing users to select the way they want to switch to a new mode. The implementation of MMHSF is tested and evaluated on an AVR-based 32 bit board EVK1100 with an AVR32UC3A0512 micro-controller. We have tested the behavior of each system mode and for each mode change protocol. We also provide the results for the performance measures of all mode change protocols in the thesis. RESUMEN Los conmutadores de modo son usados para particionar el comportamiento del sistema en diferentes modos, reduciendo así la complejidad de grandes sistemas empotrados. Estos sistemas tienen multiples modos de operación, cada uno de ellos correspondiente a distintos escenarios y para distintas aplicaciones; son llamados Sistemas Multimodales (o en inglés “Multi-Mode Systems” o MMS). Normalmente cada modo ejecuta una parte de código distinto. En un momento dado el sistema, que está en un modo concreto, puede ser cambiado a otro modo distinto como resultado de alguna condicion impuesta previamente. Los mecanismos de cambio de modo (o protocolos de cambio de modo) son usados para mover el sistema de un modo a otro durante el tiempo de ejecución. En este trabajo se ha usado un modelo de sistema operativo para implementar un sistema multimodo llamado MMHSF, siglas en inglés correspondientes a (Multi-Mode Hierarchical Scheduling Framework). Este sistema está basado en el HSF (Hierarchical Scheduling Framework), un modelo de sistema operativo con jerarquía de dos niveles, implementado en un sistema operativo en tiempo real de libre distribución llamado FreeRTOS, capaz de permitir el aislamiento temporal entre componentes. La principal contribución de este trabajo es la ampliación del HSF convirtiendolo en un sistema multimodo realizando los cambios mínimos necesarios sobre el sistema operativo FreeRTOS y la implementación ya existente del HSF. Esta implementación usa un sistema de planificación de prioridad fija para ambos niveles de jerarquía, ocupando el tiempo entre tareas con un “modo reposo”. Además el sistema es capaz de cambiar de un modo a otro en tiempo de ejecución. Cada subsistema y tarea son capaces de tener distintos atributos de tiempo (prioridad, periodo y tiempo de ejecución) en función del modo. Bajo una demanda de cambio de modo (Mode Change Request MCR) se puede variar el set de tareas en ejecución, así como los atributos de los servidores y las tareas. Un protocolo de cambio de modo espeficica precisamente cómo será cambiado el sistema de un modo a otro. Sin embargo una aplicación puede requerir no solo un cambio de modo, sino que lo haga de una forma especifica. Por ejemplo, el cambio de modo de “normal” a “apagado” puede permitir a las tareas en ejecución ser finalizadas antes de que se complete la transición, pero sin embargo el cambio de “normal” a “emergencia” puede requerir abortar todas las tareas instantaneamente. En este trabajo ambas características, tanto el modo como el protocolo de cambio, pueden ser cambiadas en tiempo de ejecución, pero deben ser previamente definidas por el desarrollador. Han sido definidos tres protocolos de cambios: el protocolo “suspender/continuar”, protocolo “abortar” y el protocolo “completar”. Estos protocolos incrementan la flexibilidad del sistema, permitiendo al usuario seleccionar de que forma quieren cambiar hacia el nuevo modo. La implementación del MMHSF ha sido testada y evaluada en una placa AVR EVK1100, con un micro-controlador AVR32UC3A0. Se ha comprobado el comportamiento de los distintos modos para los distintos protocolos, definidos previamente. Como resultado se proporcionan las medidades de rendimiento de los distintos protocolos de cambio de modo.

Prototipado de sistemas multiprocesador en FPGA

Los procesadores tradicionales de un solo núcleo han tenido que enfrentarse a grandes desafíos para poder mejorar su rendimiento y eficiencia energética. Mientras tanto, el rápido avance de las tecnologías de fabricación ha permitido la implementación de varios procesadores en un solo chip, ofreciendo un alto rendimiento y eficiencia energética. Éstos son los llamados procesadores multinúcleo. El objetivo de este proyecto es realizar un sistema multiprocesador para el procesamiento digital de señales de radio. Este sistema multiprocesador puede ser implementado en una tarjeta de prototipado. Para ello se ha utilizado el softcore MB-Lite y el sistema operativo en tiempo real FreeRTOS. ABSTRACT. Traditional single-core processors have faced great challenges to improve their performance and energy efficiency. Meanwhile, rapid advancing fabrication technologies have enabled the implementation of several processors in a single chip, providing high performance and energy efficiency. These are called multi-core processors. The aim of this project is to perform a multiprocessor system for digital radio signal processing. This multiprocessor system can be implemented in a general purpose prototyping card using. To achieve this project, the MB-Lite softcore and the FreeRTOS real time operating system have been used.

Flexible processing architecture for maintaining QoS in embedded systems applications

Comunicación presentada en las V Jornadas de Computación Empotrada, Valladolid, 17-19 Septiembre 2014

Evolutionary placement of continuously operating reference stations of network Real-Time Kinematic

Network RTK (Real-Time Kinematic) is a technology that is based on GPS (Global Positioning System) or more generally on GNSS (Global Navigation Satellite System) observations to achieve centimeter-level accuracy positioning in real time. It is enabled by a network of Continuously Operating Reference Stations (CORS). CORS placement is an important problem in the design of network RTK as it directly affects not only the installation and running costs of the network RTK, but also the Quality of Service (QoS) provided by the network RTK. In our preliminary research on the CORS placement, we proposed a polynomial heuristic algorithm for a so-called location-based CORS placement problem. From a computational point of view, the location-based CORS placement is a largescale combinatorial optimization problem. Thus, although the heuristic algorithm is efficient in computation time it may not be able to find an optimal or near optimal solution. Aiming at improving the quality of solutions, this paper proposes a repairing genetic algorithm (RGA) for the location-based CORS placement problem. The RGA has been implemented and compared to the heuristic algorithm by experiments. Experimental results have shown that the RGA produces better quality of solutions than the heuristic algorithm.

A real-time asymmetric multiprocessor-reconfigurable system-on-chip architecture

We propose an asymmetric multi-processor SoC architecture, featuring a master CPU running uClinux, and multiple loosely-coupled slave CPUs running real-time threads assigned by the master CPU. Real-time SoC architectures often demand a compromise between a generic platform for different applications, and application-specific customizations to achieve performance requirements. Our proposed architecture offers a generic platform running a conventional embedded operating system providing a traditional software-oriented development approach, while multiple slave CPUs act as a dedicated independent real-time threads execution unit running in parallel of master CPU to achieve performance requirements. In this paper, the architecture is described, including the application / threading development environment. The performance of the architecture with several standard benchmark routines is also analysed.

A synthesizable hardware evolutionary algorithm design for unmanned aerial system real-time path planning

The main objective of this paper is to detail the development of a feasible hardware design based on Evolutionary Algorithms (EAs) to determine flight path planning for Unmanned Aerial Vehicles (UAVs) navigating terrain with obstacle boundaries. The design architecture includes the hardware implementation of Light Detection And Ranging (LiDAR) terrain and EA population memories within the hardware, as well as the EA search and evaluation algorithms used in the optimizing stage of path planning. A synthesisable Very-high-speed integrated circuit Hardware Description Language (VHDL) implementation of the design was developed, for realisation on a Field Programmable Gate Array (FPGA) platform. Simulation results show significant speedup compared with an equivalent software implementation written in C++, suggesting that the present approach is well suited for UAV real-time path planning applications.

Embedding human expert cognition and real-time trajectory planning in autonomous UAS

This thesis presents a new approach to compute and optimize feasible three dimensional (3D) flight trajectories using aspects of Human Decision Making (HDM) strategies, for fixed wing Unmanned Aircraft (UA) operating in low altitude environments in the presence of real time planning deadlines. The underlying trajectory generation strategy involves the application of Manoeuvre Automaton (MA) theory to create sets of candidate flight manoeuvres which implicitly incorporate platform dynamic constraints. Feasible trajectories are formed through the concatenation of predefined flight manoeuvres in an optimized manner. During typical UAS operations, multiple objectives may exist, therefore the use of multi-objective optimization can potentially allow for convergence to a solution which better reflects overall mission requirements and HDM preferences. A GUI interface was developed to allow for knowledge capture from a human expert during simulated mission scenarios. The expert decision data captured is converted into value functions and corresponding criteria weightings using UTilite Additive (UTA) theory. The inclusion of preferences elicited from HDM decision data within an Automated Decision System (ADS) allows for the generation of trajectories which more closely represent the candidate HDM’s decision strategies. A novel Computationally Adaptive Trajectory Decision optimization System (CATDS) has been developed and implemented in simulation to dynamically manage, calculate and schedule system execution parameters to ensure that the trajectory solution search can generate a feasible solution, if one exists, within a given length of time. The inclusion of the CATDS potentially increases overall mission efficiency and may allow for the implementation of the system on different UAS platforms with varying onboard computational capabilities. These approaches have been demonstrated in simulation using a fixed wing UAS operating in low altitude environments with obstacles present.

Real-time power line extraction from unmanned aerial system video images

In this paper a real-time vision based power line extraction solution is investigated for active UAV guidance. The line extraction algorithm starts from ridge points detected by steerable filters. A collinear line segments fitting algorithm is followed up by considering global and local information together with multiple collinear measurements. GPU boosted algorithm implementation is also investigated in the experiment. The experimental result shows that the proposed algorithm outperforms two baseline line detection algorithms and is able to fitting long collinear line segments. The low computational cost of the algorithm make suitable for real-time applications.

Assessment of real-time networks and timing for process bus applications

Widespread adoption by electricity utilities of Non-Conventional Instrument Transformers, such as optical or capacitive transducers, has been limited due to the lack of a standardised interface and multi-vendor interoperability. Low power analogue interfaces are being replaced by IEC 61850 9 2 and IEC 61869 9 digital interfaces that use Ethernet networks for communication. These ‘process bus’ connections achieve significant cost savings by simplifying connections between switchyard and control rooms; however the in-service performance when these standards are employed is largely unknown. The performance of real-time Ethernet networks and time synchronisation was assessed using a scale model of a substation automation system. The test bed was constructed from commercially available timing and protection equipment supplied by a range of vendors. Test protocols have been developed to thoroughly evaluate the performance of Ethernet networks and network based time synchronisation. The suitability of IEEE Std 1588 Precision Time Protocol (PTP) as a synchronising system for sampled values was tested in the steady state and under transient conditions. Similarly, the performance of hardened Ethernet switches designed for substation use was assessed under a range of network operating conditions. This paper presents test methods that use a precision Ethernet capture card to accurately measure PTP and network performance. These methods can be used for product selection and to assess ongoing system performance as substations age. Key findings on the behaviour of multi-function process bus networks are presented. System level tests were performed using a Real Time Digital Simulator and transformer protection relay with sampled value and Generic Object Oriented Substation Events (GOOSE) capability. These include the interactions between sampled values, PTP and GOOSE messages. Our research has demonstrated that several protocols can be used on a shared process bus, even with very high network loads. This should provide confidence that this technology is suitable for transmission substations.