998 resultados para Sheet resistance


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Unintentionally doped high-Al-content Al0.45Ga0.55N/GaN high electron mobility transistor (HEMT) structures with and without AlN interfacial layer were grown by metal-organic chemical vapor deposition (MOCVD) on two-inch sapphire substrates. The effects of AlN interfacial layer on the electrical properties were investigated. At 300 K, high two-dimensional electron gas (2DEG) density of 1.66 x 10(11) cm(-2) and high electron mobility of 1346 cm(2) V-1 s(-1) were obtained for the high Al content HEMT structure with a 1 nm AlN interfacial layer, consistent with the low average sheet resistance of 287 Omega/sq. The comparison of HEMT wafers with and without AlN interfacial layer shows that high Al content AlGaN/AlN/GaN heterostructures are potential in improving the electrical properties of HEMT structures and the device performances. (c) 2006 Elsevier B.V. All rights reserved.

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Al0.38Ga0.62N/AIN/GaN HEMT structures have been grown by metal-organic chemical vapor deposition (MOCVD) on 2-inch sapphire substrates. Samples with AIN growth time of 0s (without AIN interlayer), 12, 15, 18 and 24s are characterized and compared. The electrical properties of two-dimensional electron gas (2DEG) are improved by introducing AIN interlayers. The AIN growth time in the range of 12-18s, corresponding to the AIN thickness of 1-1.5 nm, is appropriate for the design of Al0.38Ga0.62N/AIN/GaN HEMT structures. The lowest sheet resistance of 277 Omega sq(-1) and highest room temperature 2DEG mobility of 1460 cm(2)V(-1) s(-1) are obtained on structure with AIN growth time of 12s. The structure with AIN growth time of 15s exhibits the highest 2DEG concentration of 1.59 x 10(13) cm(-2) and the smallest RMS surface roughness of 0.2 nm. (c) 2006 Elsevier B.V. All rights reserved.

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AlGaN/GaN high electron mobility transistor (HEMT) structures were grown on 2 inch sapphire substrates by MOCVD, and 0.8-mu m gate length devices were fabricated and measured. It is shown by resistance mapping that the HEMT structures have an average sheet resistance of approximately 380 Omega/sq with a uniformity of more than 96%. The 1-mm gate width devices using the materials yielded a pulsed drain current of 784 mA/mm at V-gs=0.5 V and V-ds=7 V with an extrinsic transconductance of 200 mS/mm. A 20-GHz unity current gain cutoff frequency (f(T)) and a 28-GHz maximum oscillation frequency (f(max)) were obtained. The device with a 0.6-mm gate width yielded a total output power of 2.0 W/mm (power density of 3.33 W/mm) with 41% power added efficiency (PAE) at 4 GHz.

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A novel AlGaN/GaN/GaN/GaN double heterojunction high electron mobility transistors (DH-HEMTS) structure with an AlN interlayer on sapphire substrate has been grown by MOCVD. The structure featured a 6-10 nm In0.1Ga0.9N layer inserted between the GaN channel and GaN buffer. And wer also inserted one ultrathin. AlN interlayer into the Al/GaN/GaN interface, which significantly enhanced the mobility of two-dimensional electron gas (2DEG) existed in the GaN channel. AFM result of this structure shows a good surface morphology and a low dislocation density, with the root-mean-square roughness (RMS) of 0.196 nm for a scan area of 5 mu m x 5 mu m. Temperature dependent Hall measurement was performed on this sample, and a mobility as high as 1950 cm(2)/Vs at room temperature (RT) was obtained. The sheet carrier density was 9.89 x10(12) cm(2), and average sheet resistance of 327 Omega/sq was achieved. The mobility obtained in this paper is about 50% higher than other results of similar structures which have been reported. (c) 2008 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

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AlGaN/AlN/GaN/InGaN/GaN double heterojunction high electron mobility transistors (DH-HEMTs) structures with improved buffer isolation have been investigated. The structures were grown by MOCVD on sapphire substrate. AFM result of this structure shows a good surface morphology with the root-mean-square roughness (RMS) of 0.196 nm for a scan area of 5 mu mx5 mu m. A mobility as high as 1950 cm(2)/Vs with the sheet carrier density of 9.89x10(12) cm(-2) was obtained, which was about 50% higher than other results of similar structures which have been reported. Average sheet resistance of 327 Omega/sq was achieved. The HEMTs device using the materials was fabricated, and a maximum drain current density of 718.5 mA/mm, an extrinsic transconductance of 248 mS/mm, a current gain cutoff frequency of 16 GHz and a maximum frequency of oscillation 35 GHz were achieved.

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Al0.3Ga0.7N/AlN/GaN HEMT structures with significantly high mobility have been grown by metalorganic chemical vapor deposition (MOCVD) on sapphire substrates. At room temperature (RT) a Hall mobility of 2104 cm(2)/Vs and a two-dimensional electron gas (2DEG) density of 1.1x10(13) cm(-2) are achieved, corresponding to a sheet resistance of 277.8 Omega/sq. The elimination of V-shaped defects were observed on Al0.3Ga0.7N/AlN/GaN HEMT structures and correlated with the increase of 2DEG mobility. (c) 2006 WILEY-VCH Verlag GmbH & Co KGaA, Weinheim.

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Improved electrical properties of AlxGa1-xN/GaN high electron mobility transistor (HEMT) structures grown by metalorganic chemical vapor deposition (MOCVD) were achieved through increasing the Al mole fraction in the AlGaN barrier layers. An average sheet resistance of 326.6 Omega/sq and a good resistance uniformity of 98% were obtained for a 2-inch Al0.38Ga0 62N/GaN HEMT structure. The surface morphology of AlxGa1-xN/GaN HEMT structures strongly correlates with the Al content. More defects were formed with increasing Al content due to the increase of tensile strain, which limits further reduction of the sheet resistance. (c) 2006 WILEY-VCH Verlag GmbH & Co KGaA, Weinheim.

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Epitaxial growth of semiconductor films in multiple-wafer mode is under vigorous development in order to improve yield output to meet the industry increasing demands. Here we report on results of the heteroepitaxial growth of multi-wafer 3C-SiC films on Si(100) substrates by employing a home-made horizontal hot wall low pressure chemical vapour deposition (HWLPCVD) system which was designed to be have a high-throughput, multi-wafer (3x2-inch) capacity. 3C-SiC film properties of the intra-wafer and the wafer-to-wafer including crystalline morphologies, structures and electronics are characterized systematically. The undoped and the moderate NH3 doped n-type 3C-SiC films with specular surface are grown in the HWLPCVD, thereafter uniformities of intra-wafer thickness and sheet resistance of the 3C-SiC films are obtained to be 6%similar to 7% and 6.7%similar to 8%, respectively, and within a run, the deviations of wafer-to-wafer thickness and sheet resistance are less than 1% and 0.8%, respectively.

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Solid films containing phosphorus impurities were formed on p-type silicon wafer surface by traditional spin-on of commercially available dopants. The doping process is accomplished by irradiating the sample with a 308 nm XeCl pulsed excimer laser. Shallow junctions with a high concentration of doped impurities were obtained. The measured impurity profile was ''box-like'', and is very suitable for use in VLSI devices. The characteristics of the doping profile against laser fluence (energy density) and number of laser pulses were studied. From these results, it is found that the sheet resistance decreases with the laser fluence above a certain threshold, but it saturates as the energy density is further increased. The junction depth increases with the number of pulses and the laser energy density. The results suggest that this simple spin-on dopant pre-deposition technique can be used to obtain a well controlled doping profile similar to the technique using chemical vapor in pulsed laser doping process.

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The interaction of Co with Si and SiO2 during rapid thermal annealing has been investigated. Phase sequence, layer morphology, and reaction kinetics were studied by sheet resistance, x-ray diffraction, Auger electron spectroscopy, x-ray photoelectron spectroscopy, and scanning electron microscopy. With increasing annealing temperature, Co film on Si(100) is transformed sequentially into Co2Si, CoSi, and finally CoSi2 which corresponds to the minimum of sheet resistance. No evidence of silicide formation was observed for Co/SiO2 annealed even at the high temperature of 1050-degrees-C.

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50mm 3C-SiC epilayers are grown on (100) and (111) Si substrates in a newly developed horizontal lowpressure hot-wall CVD reactor under different growth pressures and flow rates of H_2 carrier gas. The structure,electrical properties, and thickness uniformity of the 3C-SiC epilayers are investigated by X-ray diffraction (XRD) ,sheet resistance measurement, and spectroscopic ellipsometry. XRD patterns show that the 3C-SiC films have excellent crystallinity. The narrowest full widths at half maximum of the SIC(200) and (111) peaks are 0.41° and 0.21°, respectively. The best electrical uniformity of the 50mm 3C-SiC films obtained by sheet resistance measurement is 2.15%. A σ/mean value of ± 5.7% in thickness uniformity is obtained.

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The growth,fabrication,and characterization of 0.2μm gate-length AlGaN/GaN HEMTs,with a high mobility GaN thin layer as a channel,grown on (0001) sapphire substrates by MOCVD,are described.The unintentionally doped 2.5μm thick GaN epilayers grown with the same conditions as the GaN channel have a room temperature electron mobility of 741cm2/(V·s) at an electron concentration of 1.52×1016 cm-3.The resistivity of the thick GaN buffer layer is greater than 108Ω·cm at room temperature.The 50mm HEMT wafers grown on sapphire substrates show an average sheet resistance of 440.9Ω/□ with uniformity better than 96%.Devices of 0.2μm×40μm gate periphery exhibit a maximum extrinsic transconductance of 250mS/mm and a current gain cutoff frequency of77GHz.The AlGaN/GaN HEMTs with 0.8mm gate width display a total output power of 1.78W (2.23W/mm) and a linear gain of 13.3dB at 8GHz.The power devices also show a saturated current density as high as 1.07A/mm at a gate bias of 0.5V.

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50mm SiC films with high electrical uniformity are grown on Si(111) by a newly developed vertical low-pressure chemical vapor deposition (LPCVD) reactor.Both in-situ n- and p-type doping of 3C-SiC are achieved by intentional introduction of ammonia and boron into the precursor gases.The dependence of growth rate and surface morphology on the C/Si ratio and optimized growth conditions is obtained.The best electrical uniformity of 50mm 3C-SiC films obtained by non-contact sheet resistance measurement is ±2.58%.GaN films are grown atop the as-grown 3C-SiC/Si(111) layers using molecular beam epitaxy (MBE).The data of both X-ray diffraction and low temperature photoluminescence of GaN/3C-SiC/Si(111) show that 3C-SiC is an appropriate substrate or buffer layer for the growth of Ⅲ-nitrides on Si substrates with no cracks.

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Nickel germanide Schottky contacts, formed by rapid thermal annealing of thin nickel films, have been characterized on n-type germanium wafers for a range of RTA temperatures. The highest Schottky barrier heights for electrons (= 0.6-0.7 eV) were obtained for RTA temperatures of approximately 300°C. For this RTA schedule, the corresponding barrier height for holes is close to zero, ideal for Schottky contacted p-channel germanium MOSFETs. When the RTA temperature was increased to 400oC, a dramatic reduction in electron barrier height (< 0.1 eV) was observed. This RTA schedule, therefore, appears ideal for ohmic source/drain contacts to n channel germanium MOSFETs. From sheet resistance measurements and XRD characterization, nickel germanide formation was found to occur at 300oC and above. The NiGe phase was dominant for RTA temperatures up to at least 435oC.

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Scaling down of the CMOS technology requires thinner gate dielectric to maintain high performance. However, due to the depletion of poly-Si gate, it is difficult to reduce the gate thickness further especially for sub-65 nm CMOS generation. Fully silicidation metal gate (FUSI) is one of the most promising solutions. Furthermore, FUSI metal gate reduces gate-line sheet resistance, prevents boron penetration to channels, and has good process compatibility with high-k gate dielectric. Poly-SiGe gate technology is another solution because of its enhancement of boron activation and compatibility with the conventional CMOS process. Combination of these two technologies for the formation of fully germanosilicided metal gate makes the approach very attractive. In this paper, the deposition of undoped Poly-Si₁₋xGex (0 < x < 30% ) films onto SiO₂ in a low pressure chemical vapor deposition (LPCVD) system is described. Detailed growth conditions and the characterization of the grown films are presented.