Digital chaos analysis in optical logic structures

Digital chaotic behavior in an optically processing element is analyzed. It was obtained as the result of processing two fixed trains of bits. The process is performed with an optically programmable logic gate. Possible outputs, for some specific conditions of the circuit, are given. Digital chaotic behavior is obtained, by using a feedback configuration. Different ways to analyze a digital chaotic signal are presented.

Chaotic behaviour evaluation in optical logic gates with fractal concepts

A chaotic output was obtained previously by us, from an Optical Programmable Logic Cell when a feedback is added. Some time delay is given to the feedback in order to obtain the non-linear behavior. The working conditions of such a cell is obtained from a simple diagram with fractal properties. We analyze its properties as well as the influence of time delay on the characteristics of the working diagram. A further study of the chaotic obtained signal is presented.

Photonic switching architectures with logic cells

Possible switching architectures, with Optically Programmable Logic Cells - OPLCs - will be reported in this paper. These basic units, previously employed by us for some other applications mainly in optical computing, will be employed as main elements to switch optical communications signals. The main aspect to be considered is that because the nternal components of these cells have nonlinear behaviors, namely either pure bistable or SEED-like properties, several are the possibilities to be obtained. Moreover, because their properties are dependent, under certain condition, of the signal wavelength, they are apt to be employed in WDM systems and the final result will depend on the orresponding optical signal frequency. We will give special emphasis to the case where self-routing is achieved, namely to structures of the Batcher or Banyan type. In these cases, as it will be shown, there is the possibility to route any packet input to a certain direction according to its first bits. The number of possible outputs gives the number of bits needed to route signals. An advantage of this configuration is that a very versatile behavior may be allowed. The main one is the possibility to obtain configurations with different kinds of behavior, namely, Strictly Nonblocking, Wide-Sense Nonblocking or Rearrangeably Nonblocking as well as to eliminate switching conflicts at a certain intermediate stages.

A Dynamically Adaptable Bus Architecture for Trading-Off Among Performance, Consumption and Dependability in Cyber-Physical Systems

Cyber-Physical Systems need to handle increasingly complex tasks, which additionally, may have variable operating conditions over time. Therefore, dynamic resource management to adapt the system to different needs is required. In this paper, a new bus-based architecture, called ARTICo3, which by means of Dynamic Partial Reconfiguration, allows the replication of hardware tasks to support module redundancy, multi-thread operation or dual-rail solutions for enhanced side-channel attack protection is presented. A configuration-aware data transaction unit permits data dispatching to more than one module in parallel, or provide coalesced data dispatching among different units to maximize the advantages of burst transactions. The selection of a given configuration is application independent but context-aware, which may be achieved by the combination of a multi-thread model similar to the CUDA kernel model specification, combined with a dynamic thread/task/kernel scheduler. A multi-kernel application for face recognition is used as an application example to show one scenario of the ARTICo3 architecture.

Cyber security of networked critical infrastructures [Guest Editorial]

A new era of cyber warfare has appeared on the horizon with the discovery and detection of Stuxnet. Allegedly planned, designed, and created by the United States and Israel, Stuxnet is considered the first known cyber weapon to attack an adversary state. Stuxnet's discovery put a lot of attention on the outdated and obsolete security of critical infrastructure. It became very apparent that electronic devices that are used to control and operate critical infrastructure like programmable logic controllers (PLCs) or supervisory control and data acquisition (SCADA) systems lack very basic security and protection measures. Part of that is due to the fact that when these devices were designed, the idea of exposing them to the Internet was not in mind. However, now with this exposure, these devices and systems are considered easy prey to adversaries.

PLA folding algorithm from compatibility relations

The letter reports an algorithm for the folding of programmable logic arrays. The algorithm is valid for both column and row folding, although it has been presented considering only the simple column folding. The pairwise compatibility relations among all the pairs of the columns of the PLA are plotted in a matrix called the compatibility matrix of the PLA. A foldable compatibility matrix (FCM), a new concept defined in the letter, is then derived from the compatibility matrix. Once an FCM is obtained, the ordered pairs of fold-able columns and the reordering of the rows are readily determined

Design of crosspoint-irredundant PLAs using minimal number of control inputs

The problem of determining a minimal number of control inputs for converting a programmable logic array (PLA) with undetectable faults to crosspoint-irredundant PLA for testing has been formulated as a nonstandard set covering problem. By representing subsets of sets as cubes, this problem has been reformulated as familiar problems. It is noted that this result has significance because a crosspoint-irredundant PLA can be converted to a completely testable PLA in a straightforward fashion, thus achieving very good fault coverage and easy testability.

REDEFINE: Architecture of a SoC Fabric for Runtime Composition of Computation Structures

In this paper we propose the architecture of a SoC fabric onto which applications described in a HLL are synthesized. The fabric is a homogeneous layout of computation, storage and communication resources on silicon. Through a process of composition of resources (as opposed to decomposition of applications), application specific computational structures are defined on the fabric at runtime to realize different modules of the applications in hardware. Applications synthesized on this fabric offers performance comparable to ASICs while retaining the programmability of processing cores. We outline the application synthesis methodology through examples, and compare our results with software implementations on traditional platforms with unbounded resources.

Efficient methods for stochastic optimal control

The Hamilton Jacobi Bellman (HJB) equation is central to stochastic optimal control (SOC) theory, yielding the optimal solution to general problems specified by known dynamics and a specified cost functional. Given the assumption of quadratic cost on the control input, it is well known that the HJB reduces to a particular partial differential equation (PDE). While powerful, this reduction is not commonly used as the PDE is of second order, is nonlinear, and examples exist where the problem may not have a solution in a classical sense. Furthermore, each state of the system appears as another dimension of the PDE, giving rise to the curse of dimensionality. Since the number of degrees of freedom required to solve the optimal control problem grows exponentially with dimension, the problem becomes intractable for systems with all but modest dimension.

In the last decade researchers have found that under certain, fairly non-restrictive structural assumptions, the HJB may be transformed into a linear PDE, with an interesting analogue in the discretized domain of Markov Decision Processes (MDP). The work presented in this thesis uses the linearity of this particular form of the HJB PDE to push the computational boundaries of stochastic optimal control.

This is done by crafting together previously disjoint lines of research in computation. The first of these is the use of Sum of Squares (SOS) techniques for synthesis of control policies. A candidate polynomial with variable coefficients is proposed as the solution to the stochastic optimal control problem. An SOS relaxation is then taken to the partial differential constraints, leading to a hierarchy of semidefinite relaxations with improving sub-optimality gap. The resulting approximate solutions are shown to be guaranteed over- and under-approximations for the optimal value function. It is shown that these results extend to arbitrary parabolic and elliptic PDEs, yielding a novel method for Uncertainty Quantification (UQ) of systems governed by partial differential constraints. Domain decomposition techniques are also made available, allowing for such problems to be solved via parallelization and low-order polynomials.

The optimization-based SOS technique is then contrasted with the Separated Representation (SR) approach from the applied mathematics community. The technique allows for systems of equations to be solved through a low-rank decomposition that results in algorithms that scale linearly with dimensionality. Its application in stochastic optimal control allows for previously uncomputable problems to be solved quickly, scaling to such complex systems as the Quadcopter and VTOL aircraft. This technique may be combined with the SOS approach, yielding not only a numerical technique, but also an analytical one that allows for entirely new classes of systems to be studied and for stability properties to be guaranteed.

The analysis of the linear HJB is completed by the study of its implications in application. It is shown that the HJB and a popular technique in robotics, the use of navigation functions, sit on opposite ends of a spectrum of optimization problems, upon which tradeoffs may be made in problem complexity. Analytical solutions to the HJB in these settings are available in simplified domains, yielding guidance towards optimality for approximation schemes. Finally, the use of HJB equations in temporal multi-task planning problems is investigated. It is demonstrated that such problems are reducible to a sequence of SOC problems linked via boundary conditions. The linearity of the PDE allows us to pre-compute control policy primitives and then compose them, at essentially zero cost, to satisfy a complex temporal logic specification.

Diseño de la lógica programable de un sistema de monitorización de estructuras.

[ES]El objeto de este trabajo es desarrollar la lógica programable de una FPGA para un sistema de monitorización de estructuras. El diseño se compone de un generador de señales arbitrarias y un sistema de adquisición. El sistema de monitorización está dirigido al campo aeronáutico, pero se puede emplear en otras áreas.

Del diseño a la programación de sistemas de control para la automatización de procesos industriales basados en PLC`s

Actualmente las mayoría de sistemas de automatización industrial utilizan los Autómatas Programables (PLC - Programmable Logic Controller) como sistemas de control y el diseño de dicho sistema se realiza mediante el lenguaje de modelado Grafcet. SFCEdit es un editor de Grafcet que permite el diseño de estos sistemas de control y la exportación de los mismos en un formato XML. Resumen Por otra parte tenemos la norma IEC 61131-3 que busca estandarizar los lenguajes de programación de los PLC de esta manera no se tendría que usar un lenguaje distinto por cada fabricante, y la organización PLCOpen rigiéndose por la norma ha creado un formato XML para cada lenguaje, en los cuales se basa el traductor. Resumen Habitualmente el paso del diseño a la programación se realiza de forma manual. La automatización de este proceso es el objetivo general del proyecto realizado. En esté se ha desarrollado una herramienta que permite realizar la traducción del diseño gráfico al estándar IEC 61131-3 considerando las particularidades de algunos fabricantes de PLCs como Beckhoff (TwinCAT) y TSX Micro (PL7Pro). Además la herramienta realiza la traducción al formato XML de PLCOpen. Resumen El traductor funciona recibiendo un fichero XML (exportado de SFCEdit) procesa su información y genera los ficheros en función de la compatibilidad que el usuario seleccione.

Adaptive sequential Monte Carlo approach for real-time applications

This paper presents an adaptive Sequential Monte Carlo approach for real-time applications. Sequential Monte Carlo method is employed to estimate the states of dynamic systems using weighted particles. The proposed approach reduces the run-time computation complexity by adapting the size of the particle set. Multiple processing elements on FPGAs are dynamically allocated for improved energy efficiency without violating real-time constraints. A robot localisation application is developed based on the proposed approach. Compared to a non-adaptive implementation, the dynamic energy consumption is reduced by up to 70% without affecting the quality of solutions. © 2012 IEEE.

Negative differential resistance and memory effect in diodes based on 1,4-dibenzyl C60 and zinc phthalocyanine doped polystyrene hybrid material

Negative differential resistance (NDR) and memory effect were observed in diodes based on 1,4-dibenzyl C60 (DBC) and zinc phthalocyanine doped polystyrene hybrid material. Certain negative starting sweeping voltages led to a reproducible NDR, making the hybrid material a promising candidate in memory devices. It was found that the introduction of DBC enhanced the ON/OFF current ratio and significantly improved the memory stability. The ON/OFF current ratio was up to 2 orders of magnitude. The write-read-erase-reread cycles were more than 10(6), and the retention time reached 10 000 s without current degradation.