Hajautettujen asiakasverkkoyhteyksien valvonta

Tässä diplomityössä tutkitaan kuinka verkonvalvonta voidaan toteuttaa hajautetussa järjestelmässä. Työssä perehdytään tavallisten tietojärjestelmien ja hajautettujen järjestelmien eroihin, kyseisten järjestelmien ominaispiirteisiin sekä käsitellään mitä verkonvalvonta on yleisellä tasolla ja miten se on yleensä toteutettu tavallisissa tietojärjestelmissä. Tutkitaan tarkemmin kuinka verkonvalvonta voidaan toteuttaa tehokkaasti hajautetussa järjestelmässä sekä mitä vaatimuksia ja haasteita verkonvalvonnassa esiintyy. Tutkimukseen valittiin myös kaksi hajautetun järjestelmän verkonvalvontaan kehitettyä valvontaohjelmistoa sekä yksi laitteistopohjainen ratkaisu joita tutkitaan ja vertaillaan tarkemmin.Selvitetään onko yrityksen kannattavaa ja valvonnan kannalta tehokasta ottaa tämänkaltaista järjestelmää käyttöön. Lopputuloksena työssä on esiteltyinä kuinka verkonvalvonta voidaan toteuttaa hajautetussa järjestelmässä ja miten olemassa olevat haasteet voidaan ratkaista. Toteutusvaihtoehdot tutkittiin ja niistä valittiin paras vaihtoehto (perfSONAR) toteutustavaksi kohdeorganisaation asiakasverkkoyhteyksien valvontaan. Lopuksi esitellään toteutussuunnitelma yrityksen asiakasyhteyksien valvomiseen tarkoitetulle verkonvalvonnalle.

Fixed Point Decimal Multiplication Using RPS Algorithm

Decimal multiplication is an integral part of financial, commercial, and internet-based computations. A novel design for single digit decimal multiplication that reduces the critical path delay and area for an iterative multiplier is proposed in this research. The partial products are generated using single digit multipliers, and are accumulated based on a novel RPS algorithm. This design uses n single digit multipliers for an n × n multiplication. The latency for the multiplication of two n-digit Binary Coded Decimal (BCD) operands is (n + 1) cycles and a new multiplication can begin every n cycle. The accumulation of final partial products and the first iteration of partial product generation for next set of inputs are done simultaneously. This iterative decimal multiplier offers low latency and high throughput, and can be extended for decimal floating-point multiplication.

Balance de un proyecto de formación del profesorado a distancia.

Se hace un balance del Proyecto TRENDS (Training Educators through Networks and Distributed Systems) implantado en Grecia, España, Francia, Italia, Portugal y Reino Unido. En el balance se presentan los objetivos del proyecto y su desarrollo en el que se incluye el modelo de formación, aspectos tecnológicos y la organización del proyecto. Así mismo se hace una contextualización del proyecto en España y se concluye subrayando la gran utilidad de esta experiencia para elaborar futuros telemáticos de más amplio alcance que beneficien la formación de las personas adultas tanto en la modalidad presencial como en la de distancia .

Synthesis of a systolic array genetic algorithm

The paper presents a design for a hardware genetic algorithm which uses a pipeline of systolic arrays. These arrays have been designed using systolic synthesis techniques which involve expressing the algorithm as a set of uniform recurrence relations. The final design divorces the fitness function evaluation from the hardware and can process chromosomes of different lengths, giving the design a generic quality. The paper demonstrates the design methodology by progressively re-writing a simple genetic algorithm, expressed in C code, into a form from which systolic structures can be deduced. This paper extends previous work by introducing a simplification to a previous systolic design for the genetic algorithm. The simplification results in the removal of 2N 2 + 4N cells and reduces the time complexity by 3N + 1 cycles.

Application execution management on the InteGrade opportunistic grid middleware

The InteGrade project is a multi-university effort to build a novel grid computing middleware based on the opportunistic use of resources belonging to user workstations. The InteGrade middleware currently enables the execution of sequential, bag-of-tasks, and parallel applications that follow the BSP or the MPI programming models. This article presents the lessons learned over the last five years of the InteGrade development and describes the solutions achieved concerning the support for robust application execution. The contributions cover the related fields of application scheduling, execution management, and fault tolerance. We present our solutions, describing their implementation principles and evaluation through the analysis of several experimental results. (C) 2010 Elsevier Inc. All rights reserved.

A configurable approach to circuit simulation

This paper presents a configurable architecture which was designed to aid in the simulation of ULSI circuits at the transistor level. Elsewhere [1] this architecture was shown to be able to run such simulations several times as fast as standard circuit simulators such as SPICES. In this paper, after describing the overall idea and the the architecture of the system as a whole, I concentrate on the description of the architecture of the processing elements of the computing array.

A transactional runtime system for the Cell/BE architecture

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Data dissemination over complex networks through gossip

This thesis offers a practical and theoretical evaluations about gossip-epidemic algorithms, comparing those most common in the literature with new proposed algorithms and analyzing their behavior. Tests have been executed using one hundred graphs that has been randomly generated by Large Unstructured NEtwork Simulator (LUNES), a simulation software provided by Parallel and Distributed Simulation Research Group (PADS), of the Department of Computer Science, Università di Bologna and simulated using Advanced RTI System (ARTÌS), based on the High Level Architecture standard. Literatures algorithms have been analyzed and taken as base for new algorithms.

QoE-aware Multiple Path Video Transmission for Wireless Multimedia Sensor Networks

Wireless Multimedia Sensor Networks (WMSNs) promise a wide scope of emerging potential applications in both civilian and military areas, which require visual and audio information to enhance the level of collected information. The transmission of multimedia content requires a minimal video quality level from the user’s perspective. However, links in WMSN communi- cations are typically unreliable, as they often experience fluctuations in quality and weak connectivity, and thus, the routing protocol must evaluate the routes by using end-to-end link quality information to increase the packet delivery ratio. Moreover, the use multiple paths together with key video metrics can enhance the video quality level. In this paper, we propose a video-aware multiple path hierarchical routing protocol for efficient multimedia transmission over WMSN, called video-aware MMtransmission. This protocol finds node-disjoint multiple paths, and implements an end-to-end link quality estimation with minimal over- head to score the paths. Thus, our protocol assures multimedia transmission with Quality of Experience (QoE) and energy-efficiency support. The simula- tion results show the benefits of video-aware MMtransmission for disseminating video content by means of energy-efficiency and QoE analysis.

Solving complex problems with a bioinspired model

Membrane systems are parallel and bioinspired systems which simulate membranes behavior when processing information. As a part of unconventional computing, P-systems are proven to be effective in solvingcomplexproblems. A software technique is presented here that obtain good results when dealing with such problems. The rules application phase is studied and updated accordingly to obtain the desired results. Certain rules are candidate to be eliminated which can make the model improving in terms of time.

4CaaSt: Comprehensive management of Cloud services through a PaaS

The 4CaaSt project aims at developing a PaaS framework that enables flexible definition, marketing, deployment and management of Cloud-based services and applications. The major innovations proposed by 4CaaSt are the blueprint and its management and lifecycle, a one stop shop for Cloud services and the management of resources in the PaaS level (including elasticity). 4CaaSt also provides a portfolio of ready to use Cloud native services and Cloud- aware immigrant technologies.

Hardware Reuse Improvement through the Domain Specific Language dHDL.

The dHDL language has been defined to improve hardware design productivity. This is achieved through the definition of a better reuse interface (including parameters, attributes and macroports) and the creation of control structures that help the designer in the hardware generation process.