Marine Spatial Planning: A New Frontier? (Editorial to a special issue on Marine Spatial Planning)

Marine spatial planning is taking on greater international significance as a response to increased perceived threats to the marine environment and the need for more systematic maritime governance. It also expands the horizons of spatial planning and leads to calls for interdisciplinary research to support its development. This special issue brings together papers focusing on the need for a more active engagement of natural and social science perspectives in the formation of spatial strategies concerned with the future well-being of the seas and oceans.

Special Needs Education, eLearning and the Reflective ePortfolio: Implications for Developing and Assessing Competence in Pre-Service Education.

This paper reports on the use of an eportfolio for assessing aspects of a Post-Graduate pre-service teacher education programme specifically in the context of special needs education in Northern Ireland. Participants were challenged to develop their individual eportfolios by selecting and presenting evidence for assessment drawn from diverse sources. The rationale for using eportfolios for assessment purposes was to offer students the opportunity to demonstrate competencies by documenting and reflecting upon academic and pedagogical learning during a one year Post Graduate Certificate of Education (PGCE) programme.

Valved Dataflow For FPGA Memory Hierarchy Synthesis

For modern FPGA, implementation of memory intensive processing applications such as high end image and video processing systems necessitates manual design of complex multilevel memory hierarchies incorporating off-chip DDR and onchip BRAM and LUT RAM. In fact, automated synthesis of multi-level memory hierarchies is an open problem facing high level synthesis technologies for FPGA devices. In this paper we describe the first automated solution to this problem.
By exploiting a novel dataflow application modelling dialect, known as Valved Dataflow, we show for the first time how, not only can such architectures be automatically derived, but also that the resulting implementations support real-time processing for current image processing application standards such as H.264. We demonstrate the viability of this approach by reporting the performance and cost of hierarchies automatically generated for Motion Estimation, Matrix Multiplication and Sobel Edge Detection applications on Virtex-5 FPGA.