SOI-based thermo-optic waveguide switch matrix with spot size converters

A SOI-based thermo-optic waveguide switch matrix worked at 1.55 mu m, integrated with spot size converters is designed and fabricated for the first time. The insertion loss and polarization dependent loss are less than 13dB and 2dB, respectively. The extinction ratio is larger than 19dB. The response time is less than 5 mu s and the power consumption of the switch cell is about 200mW.

The improvement of thick oxidized porous silicon layer growth process - art. no. 60290S

Oxidizing thick porous silicon layer into silicon dioxide is a timesaving and low-cost process for producing thick silicon dioxide layer used in silicon-based optical waveguide devices. The solution of H2O2 is proposed to post-treat thick porous silicon (PS) films. The prepared PS layer as the cathode is applied about 10 mA/cm(2) current in mixture of ethanol, HF, and H2O2 solutions, in order to improve the stability and the smoothness of the surface. With the low-temperature dry-O-2 pre-oxidizations and high-temperature wet O-2 oxidizations process, a high-quality SiO2 30 mu m thickness layer that fit for the optical waveguide device was prepared. The SEM images show significant improved smoothness on the surface of oxidized PS thick films, the SiO2 film has a stable and uniformity reflex index that measured by the prism coupler, the uniformity of the reflex index in different place of the wafer is about 0.0003.

Recent progresses of SOI-based photonic devices - art. no. 60201R

SOI (Silicon on Insulator) based photonic devices, including stimulated emission from Si diode, RCE (Resonant Cavity Enhanced) photodiode with quantum structure, MOS (Metal Oxide Semiconductor) optical modulator with high frequency, SOI optical matrix switch and wavelength tunable filter are reviewed in the paper. The emphasis will be played on our recent results of SOI-based thermo-optic waveguide matrix switch with low insertion loss and fast response. A folding re-arrangeable non-blocking 4x4 matrix switch with total internal reflection (TIR) mirrors and a first blocking 16 x 16 matrix were fabricated on SOI wafer. The extinction ratio and the crosstalk are better. The insertion loss and the polarization dependent loss (PDL) at 1.55 mu m increase slightly with longer device length and more bend and intersecting waveguides. The insertion losses are expected to decrease 2-3 dB when anti-reflection films are added in the ends of the devices. The rise and fall times of the devices are 2.1 mu s and 2.3 mu s, respectively.

Novel compact SOI-based reconfigurable optical add/drop multiplexer using microring resonators - art. no. 60190L

Novel compact design for 4-channel SOI-based reconfigurable optical add/drop multiplexer using microring resonators is presented and analyzed. Microring resonators have two important attributes as a key new technology for future optical communications, namely functionality and compactness. Functionality refers to the fact that a wide range of desirable filter characteristics can be synthesized by coupling multiple rings. Compactness refers the fact that ring resonators with radii about 30 mu m can lead to large scale integration of devices with densities on the order of 10(4) similar to 10(5) devices per square centimeter. A 4-channel reconfigurable optical add/drop multiplexer comprises a grid-like array of ridge waveguides which perpendicularly cross through each other. SOI-based resonators consisted of multiple rings at each of the cross-grid nodes serve as the wavelength selective switch, and they can switch an optical signal between two ports by means of tuning refractive index of one of the rings. The thermo-optic coefficient of silicon is 1.86x 10(-4) /K. Thus a temperature rise of 27K will increase the refractive index by 5 x 10(-3), which is enough to cause the switching of our designed microring resonators. The thermo-optic effect is used to suppress the resonator power transfer, rather than to promote loss. Thus, the input signal only suffers small attenuation and simultaneously low crosstalk can be achieved by using multiple rings.

Design and Fabrication of Low-microwave loss Coplannar Waveguide and precise V groove on Silicon Substrate for Optoelectronic Packaging - art. no. 601938

Optoelectronic packaging has become a most important factor that influences the final performance and cost of the module. In this paper, low microwave loss coplanar waveguide(CPW) on high resistivity silicon(HRS) and precise V groove in silicon substrate were successfully fabricated. The microwave attenuation of the CPW made on HRS with the simple process is lower than 2 dB/cm in the frequency range of 0 similar to 26GHz, and V groove has the accuracy in micro level and smooth surface. These two techniques built a good foundation for high frequency packaging and passive coupling of the optoelectronic devices. Based on these two techniques, a simple high resistivity silicon substrate that integrated V groove and CPW for flip-chip packaging of lasers was completed. It set a good example for more complicate optoelectronic packaging.

Compact polarization-insensitive arrayed waveguide grating based on SOI material

A compact polarization-insensitive 8x8 arrayed waveguide grating with 100GHz channel spacing at 1.55 mu m is presented on the material of silicon on insulator (SOI). Increasing the epitaxial layer thickness can reduce the birefringence of the waveguide, but the wvaeguide's bend radius also increases at the same time. We choose the SOI wafer with 3.0 mu m epitaxial layer to reduce the device's size and designed the appropriate structure of rib wave-guides to eliminate the polarization dependant wavelength shift. Compared to the other methods of eliminating the polarization dependant wavelength shift, the method is convenient and easy to control the polarization without additional etching process. The index differences between TE0 and TM0 of straight and bend waveguides are 1.4x10(-5) and 3.9x10(-5), respectively. The results showed that the polarization dependant wavelength shift is 0.1nm, and the device size is 1.5x1.0 cm(2).

Structural optimizations of SOI-based single-mode rib waveguide bends

Effects of structure parameters on bend loss of rib silicon-on-insulator (Sol) bend waveguides have been analyzed by means of effective index method (EIM) and 2D bend loss formula. The simulation results indicate that the bend loss decreases with the increase of bend radius and waveguide width, as well as with the decrease of the step factor of the rib waveguide. Moreover, the optional structure parameters have been found when bend waveguides are single-mode.

The effect of Fabry-Perot interference on the packaging of SOI-based optoelectronic devices

During the packaging of optoelectrome device, a problem always met is the instability of output power. The main effect causing this problem, Fabry-Perot interference, is discussed in this paper. Both theoretical analysis and experimental test are carried out and in good agreement. As an example of avoiding the disadvantage of Fabry-Perot interference, the packaging process of Silicon-on-Insulator (SOI) based Variable Optical Attenuator(VOA) is shown at last.

Controlled growth of silicon nanowires by solid-liquid-solid method and their formation mechanism

High quality silicon nanowires (SiNWs) were grown directly from n-(111) silicon single crystal substrate by using Au film as a metallic catalyst. The diameter and length of the formed nanowires are 30-60 nm and from several micrometers to sereral tens of micrometers, respectively. The effects of Au film thickness, annealing temperature, growth time and N-2 gas flow rate on the formation of the nanowires were experimentally investigated. The results confirmed that the silicon nanowires with controlled diameter, length, shape and orientation can be obtained via reasonably choosing and optimizing various technical conditions. The formation process of the silicon nanowires is analyzed qualitatively based on solid-liquid-solid growth mechanism.

Blue Luminescent Properties of Silicon Nanowires Grown by a Solid-Liquid-Solid Method

Silicon nanowires (SiNWs) were grown directly from n-(111) single-crystal silicon (c-Si) substrate based on a solid-liquid-solid mechanism, and Au film was used as a metallic catalyst. The room temperature photoluminescence properties of SiNWs were observed by an Xe lamp with an exciting wavelength of 350 nm. The results show that the SiNWs exhibit a strongly blue luminescent band in the wavelength range 400-480 nm at an emission peak position of 420 nm. The luminescent mechanism of SiNWs indicates that the blue luminescence is attributed to the oxygen-related defects, which are in SiOx amorphous oxide shells around the crystalline core of SiNWs.

A NEW TYPE OF SILICON-ON-INSULATOR WITH A PERFECT SURFACE SILICON LAYER

A novel silicon structure consisting of a silicon-on-defect layer (SODL), with enhanced surface Hall mobility in the surface layer on a buried defect layer (DL), has been discovered [J. Li, Nucl. Instr. and Meth. B59/60 (1991) 1053]. SODL material was formed by using proton implantation and subsequent two-step annealing. The implantation was carried out with a Varian 350D ion implanter. Based on the discovery, a standard measurement method (current-voltage curve method) was adopted to measure the true resistivity value of the DL in order to replace the spreading resistivity measurement by which the true resistivity in seriously defective silicon cannot be obtained. By adopting the current-voltage current method, the true resistivity value of the DL is measured to be 4.2 x 10(9) OMEGA cm. The SODL material was proved to be a silicon-on-insulator substrate.

Investigation on the N-eff reverse annealing effect using TSC/I-DLTS: Relationship between neutron induced microscopic defects and silicon detector electrical degradations

Neutron induced defect levels in high resistivity silicon detectors have been studied using a current-based macroscopic defect analysis system: thermally stimulated current (TSC) and current deep level transient spectroscopy (I-DLTS). These studies have been correlated to the traditional C-V, I-V, and transient current and charge techniques (TCT/TChT) after neutron radiation and subsequent thermal anneals. It has been found that the increases of the space charge density, N-eff, in irradiated detectors after thermal anneals (N-eff reverse anneal) correspond to the increases of deep levels in the silicon bandgap. In particular, increases of the double vacancy center (V-V and V-V-- -) and/or C-i-O-i level have good correlations with the N-eff reverse anneal. It has also been observed that the leakage current of highly irradiated (Phi(n) > 10(13) n/cm(2)) detectors increases after thermal anneals, which is different from the leakage current annealing behavior of slightly irradiated (Phi(n) < 10(13) n/cm(2)) detectors. It is apparent that V-V center and/or C-i-O-i level play important roles in both N-eff and leakage current degradations for highly irradiated high resistivity silicon detectors.

Microscopic analysis of defects in a high resistivity silicon detector irradiated to 1.7x10(15)n/cm(2)

Current-based microscopic defect analysis methods with optical filling techniques, namely current deep level transient spectroscopy (I-DLTS) and thermally stimulated current (TSC), have been used to study defect levels in a high resistivity silicon detector (p(+)-n-n(+)) induced by very high fluence neutron (VHFN) irradiation (1.7x10(15) n/cm(2)). As many as fourteen deep levels have been detected by I-DLTS. Arrhenius plots of the I-DLTS data have shown defects with energy levels ranging from 0.03 eV to 0.5 eV in the energy band gap. Defect concentrations of relatively shallow levels (E(t) < 0.33 eV) are in the order of 10(13)cm(-3), while those for relatively deep levels (E(t) > 0.33 eV) are in the order of 10(14) cm(-3). TSC data have shown similar defect spectra. A full depletion voltage of about 27,000 volts has been estimated by C-V measurements for the as-irradiated detector, which corresponds to an effective space charge density (N-eff) in the order of 2x10(14) cm(-3). Both detector leakage current and full depletion voltage have been observed to increase with elevated temperature annealing (ETA). The increase of the full depletion voltage corresponds to the increase of some deep levels, especially the 0.39 eV level. Results of positron annihilation spectroscopy have shown a decrease of total concentration of vacancy related defects including vacancy clusters with ETA, suggesting the breaking up of vacancy clusters as possible source of vacancies for the formation of single defects during the reverse anneal.

Electronic properties of zinc-blende GaN, AlN, and their alloys Ga1-xAlxN

The electronic properties of wide-energy gap zinc-blende structure GaN, A1N, and their alloys Ga(1-x)A1(x)N are investigated using the empirical pseudopotential method. Electron and hole effective mass parameters, hydrostatic and shear deformation potential constants of the valence band at Gamma and those of the conduction band at Gamma and X are obtained for GaN and AIN, respectively. The energies of Gamma, X, L conduction valleys of Ga(1-x)A1(x)N alloy versus Al fraction x are also calculated. The information will be useful for the design of lattice mismatched heterostructure optoelectronic devices based on these materials in the blue light range application. (C) 1995 American Institute of Physics.

Recent Progress in Silicon Electro-optic Modulators for High Speed Applications

Silicon-based high-speed electro-optical modulator is the key component of silicon photonics for future communiction and interconnection systems. In this paper, introduced are the optical mudulation mechanisms in silicon, reviewed are some recent progresses in high-speed silicon modulators, and analyzed are advantages and shortages of the silicon modulators of different types.