968 resultados para electronic devices
Resumo:
Three-dimensional modeling of piezoelectric devices requires a precise knowledge of piezoelectric material parameters. The commonly used piezoelectric materials belong to the 6mm symmetry class, which have ten independent constants. In this work, a methodology to obtain precise material constants over a wide frequency band through finite element analysis of a piezoceramic disk is presented. Given an experimental electrical impedance curve and a first estimate for the piezoelectric material properties, the objective is to find the material properties that minimize the difference between the electrical impedance calculated by the finite element method and that obtained experimentally by an electrical impedance analyzer. The methodology consists of four basic steps: experimental measurement, identification of vibration modes and their sensitivity to material constants, a preliminary identification algorithm, and final refinement of the material constants using an optimization algorithm. The application of the methodology is exemplified using a hard lead zirconate titanate piezoceramic. The same methodology is applied to a soft piezoceramic. The errors in the identification of each parameter are statistically estimated in both cases, and are less than 0.6% for elastic constants, and less than 6.3% for dielectric and piezoelectric constants.
Resumo:
In this work, high-aligned single-walled carbon nanotube (SWCNT) forest have been grown using a high-density plasma chemical vapor deposition technique (at room temperature) and patterned into micro-structures by photolithographic techniques, that are commonly used for silicon integrated circuit fabrication. The SWCNTs were obtained using pure methane plasma and iron as precursor material (seed). For the growth carbon SWCNT forest the process pressure was 15 mTorr, the RF power was 250W and the total time of the deposition process was 3 h. The micropatterning processes of the SWCNT forest included conventional photolithography and magnetron sputtering for growing an iron layer (precursor material). In this situation, the iron layer is patterned and high-aligned SWCNTs are grown in the where iron is present, and DLC is formed in the regions where the iron precursor is not present. The results can be proven by Scanning Electronic Microscopy and Raman Spectroscopy. Thus, it is possible to fabricate SWCNT forest-based electronic and optoelectronic devices. (C) 2010 Elsevier B.V. All rights reserved.
Resumo:
The impact of the titanium nitride (TIN) gate electrode thickness has been investigated in n and p channel SOI multiple gate field effect transistors (MuGFETs) through low frequency noise charge pumping and static measurements as well as capacitance-voltage curves The results suggest that a thicker TIN metal gate electrode gives rise to a higher EOT a lower mobility and a higher interface trap density The devices have also been studied for different back gate biases where the GIFBE onset occurs at lower front-gate voltage for thinner TIN metal gate thickness and at higher V(GF) In addition it is demonstrated that post deposition nitridation of the MOCVD HfSiO gate dielectric exhibits an unexpected trend with TIN gate electrode thickness where a continuous variation of EOT and an increase on the degradation of the interface quality are observed (C) 2010 Elsevier Ltd All rights reserved
Resumo:
The harmonic distortion (HD) exhibited by un-strained and biaxially strained fin-shaped field-effect transistors operating in saturation as single-transistor amplifiers has been investigated for devices with different channel lengths L and fin widths W(fin). The study has been performed through device characterization, 3-D device simulations, and modeling. Nonlinearity has been evaluated in terms of second- and third-order HDs (HD2 and HD3, respectively), and a discussion on its physical sources has been carried out. Also, the influence of the open-loop voltage gain AV in HD has been observed.
Resumo:
Adsorbent and corrosion resistant films are useful for sensor development. Therefore, the aim of this work is the production and characterization of plasma polymerized fluorinated organic ether thin films for sensor development. The polymerized reactant was methyl nonafluoro(iso)butyl ether. Infrared Spectroscopy showed fluorinated species and eventually CO but CH(n) is a minor species. Contact angle measurements indicated that the film is hydrophobic and organophilic but oleophobic. Optical microscopy reveals not only a good adherence on metals and acrylic but also resistance for organic solvents, acid and basic aqueous solution exposure. Double layer and intermixing are possible and might lead to island formation. Quartz Crystal Microbalance showed that 2-propanol permeates the film but there is no sensitivity to n-hexane. The microreactor manufactured using a 73 cm long microchannel can retain approximately 9 X 10(-4) g/cm(2) of 2-propanol in vapor phase. Therefore, the film is a good candidate for preconcentration of volatile organic compounds even in corrosive environment. (C) 2009 Elsevier B.V. All rights reserved.
Resumo:
The present work reports on the effect of the type of backside contact used in the electrochemical process and their relation with the structural features and optical responses of the one-dimensional photonic crystal (PC) anodized in simple and double electrochemical cell. The PC, obtained in the single cell, showed to have thicker layers than of the PC obtained in double electrochemical cell. Additionally, the PC obtained in double cell showed highest reflectance in the band gap region than of the PCs obtained in single cell. These results suggest that the interface roughness between adjacent layers in the PC devices obtained in double electrochemical cell is minimized. (C) 2008 Elsevier Ltd. All rights reserved.
Resumo:
In this study, oxide and nitride films were deposited at room temperature through the reaction of silicon Sputtered by argon and oxygen ions or argon and nitrogen ions at 250 and 350 W with 0.67 Pa pressure. It was observed that for both thin films the deposition rates increase with the applied RF power and decrease with the increase of the gas concentration. The Si/O and Si/N ratio were obtained through RBS analyses and for silicon oxide the values changed from 0.42 to 0.57 and for silicon nitride the Values changed from 0.4 to 1.03. The dielectric constants were calculated through capacitance-voltage curves with the silicon oxide values varying from 2.4 to 5.5, and silicon nitride values varying from 6.2 to 6.7, which are good options for microelectronic dielectrics. (c) 2008 Elsevier Ltd. All rights reserved.
Resumo:
This work characterizes the analog performance of SOI n-MuGFETs with HfSiO gate dielectric and TiN metal gate with respect to the influence of the high-k post-nitridation. TiN thickness and device rotation. A thinner TiN metal gate is found favorable for improved analog characteristics showing an increase in intrinsic voltage gain. The devices where the high-k material is subjected to a nitridation step indicated a degradation of the Early voltage (V(EA)) values which resulted in a lower voltage gain. The 45 degrees rotated devices have a smaller V(EA) than the standard ones when a HfSiO dielectric is used. However, the higher transconductance of these devices, due to the increased mobility in the (1 0 0) sidewall orientation, compensates this V(EA) degradation of the voltage gain, keeping it nearly equal to the voltage gain values of the standard devices. (C) 2011 Elsevier Ltd. All rights reserved.
Resumo:
This work shows a comparison between the analog performance of standard and strained Si n-type triple-gate FinFETs with high-K dielectrics and TiN gate material. Different channel lengths and fin widths are studied. It is demonstrated that both standard and strained FinFETs with short channel length and narrow fins have similar analog properties, whereas the increase of the channel length degrades the early voltage of the strained devices, consequently decreasing the device intrinsic voltage gain with respect to standard ones. Narrow strained FinFETs with long channel show a degradation of the Early voltage if compared to standard ones suggesting that strained devices are more subjected to the channel length modulation effect. (C) 2008 Elsevier Ltd. All rights reserved.
Resumo:
This work proposes a refined technique for the extraction of the generation lifetime in single- and double-gate partially depleted SOI nMOSFETs. The model presented in this paper, based on the drain current switch-off transients, takes into account the influence of the laterally non-uniform channel doping, caused by the presence of the halo implanted region, and the amount of charge controlled by the drain and source junctions on the floating body effect when the channel length is reduced. The obtained results for single- gate (SG) devices are compared with two-dimensional numerical simulations and experimental data, extracted for devices fabricated in a 0.1 mu m SOI CMOS technology, showing excellent agreement. The improved model to determine the generation lifetime in double-gate (DG) devices beyond the considerations previously presented also consider the influence of the silicon layer thickness on the drain current transient. The extracted data through the improved model for DG devices were compared with measurements and two-dimensional numerical simulations of the SG devices also presenting a good adjustment with the channel length reduction and the same tendency with the silicon layer thickness variation.
Resumo:
This work investigates the harmonic distortion (HD) in 2-MOS balanced structures composed of triple gate FinFETs. HD has been evaluated through the determination of the third-order harmonic distortion (HD3), since this represents the major non-linearity source in balanced structures. The 2-MOS structures with devices of different channel lengths (L) and fin widths (W(fin)) have been studied operating in the linear region as tunable resistors. The analysis was performed as a function of the gate voltage, aiming to verify the correlation between operation bias and HD3. The physical origins of the non-linearities have been investigated and are pointed out. Being a resistive circuit, the 2-MOS structure is generally projected for a targeted on-resistance, which has also been evaluated in terms of HD3. The impact of the application of biaxial strain has been studied for FinFETs of different dimensions. It has been noted that HD3 reduces with the increase of the gate bias for all the devices and this reduction is more pronounced both in narrower and in longer devices. Also, the presence of strain slightly diminishes the non-linearity at a similar bias. However, a drawback associated with the use of strain engineering consists in a significant reduction of the on-resistance with respect to unstrained devices. (C) 2011 Elsevier Ltd. All rights reserved.
Resumo:
The present work reports the thermal annealing process, the number of layer and electrochemical process effect in the optical response quality of Bragg and microcavity devices that were applied as organic solvent sensors. These devices have been obtained by using porous silicon (PS) technology. The optical characterization of the Bragg reflector, before annealing, showed a broad photonic band-gap structure with blue shifted and narrowed after annealing process. The electrochemical process used to obtain the PS-based device imposes the limit in the number of layers because of the chemical dissolution effect. The interface roughness minimizations in the devices have been achieved by using the double electrochemical cell setup. The microcavity devices showed to have a good sensibility for organic solvent detection. The thermal annealed device showed better sensibility feature and this result was attributed to passivation of the surface devices. (c) 2007 Elsevier Ltd. All rights reserved.
Resumo:
This work focuses on the impact of the source and drain Selective Epitaxial Growth (SEG) on the performance of uniaxially strained MuGFETs. With the channel length reduction, the normalized transconductance (gm.L./W) of unstressed MuGFETs decreases due to the series resistance and short channel effects (SCE), while the presence of uniaxial strain improves the gm. The competition between the series resistance (R(s)) and the uniaxial strain results in a normalized gm maximum point for a specific channel length. Since the SEG structure influences both R(s) and the strain in the channel, this work studies from room down to low temperature how these effects influence the performance of the triple-gate FETs. For lower temperatures, the strain-induced mobility enhancement increases and leads to a shift in the maximum point towards shorter channel lengths for devices without SEG. This shift is not observed for devices with SEG where the strain level is much lower. At 150 K the gm behavior of short channel strained devices with SEG is similar to the non SEC ones due to the better gm temperature enhancement for devices without SEG caused by the strain. For lower temperatures SEG structure is not useful anymore. (C) 2011 Elsevier Ltd. All rights reserved.
Resumo:
Chaotic signals have been considered potentially attractive in many signal processing applications ranging from wideband communication systems to cryptography and watermarking. Besides, some devices as nonlinear adaptive filters and phase-locked loops can present chaotic behavior. In this paper, we derive analytical expressions for the autocorrelation sequence, power spectral density and essential bandwidth of chaotic signals generated by the skew tent map. From these results, we suggest possible applications in communication systems. (C) 2009 Elsevier B.V. All rights reserved.
Resumo:
Second-order phase locked loops (PLLs) are devices that are able to provide synchronization between the nodes in a network even under severe quality restrictions in the signal propagation. Consequently, they are widely used in telecommunication and control. Conventional master-slave (M-S) clock-distribution systems are being, replaced by mutually connected (MC) ones due to their good potential to be used in new types of application such as wireless sensor networks, distributed computation and communication systems. Here, by using an analytical reasoning, a nonlinear algebraic system of equations is proposed to establish the existence conditions for the synchronous state in an MC PLL network. Numerical experiments confirm the analytical results and provide ideas about how the network parameters affect the reachability of the synchronous state. The phase-difference oscillation amplitudes are related to the node parameters helping to design PLL neural networks. Furthermore, estimation of the acquisition time depending on the node parameters allows the performance evaluation of time distribution systems and neural networks based on phase-locked techniques. (c) 2008 Elsevier GmbH. All rights reserved.