Hardness and structure characterization of Ti(6)Al(4)V films produced by reactive magnetron sputtering on a conventional austenitic stainless steel

Ti(6)Al(4)V thin films were grown by magnetron sputtering on a conventional austenitic stainless steel. Five deposition conditions varying both the deposition chamber pressure and the plasma power were studied. Highly textured thin films were obtained, their crystallite size (C) 2008 Elsevier Ltd. All rights reserved.

Backside contact effect on the morphological and optical features of porous silicon photonic crystals

The present work reports on the effect of the type of backside contact used in the electrochemical process and their relation with the structural features and optical responses of the one-dimensional photonic crystal (PC) anodized in simple and double electrochemical cell. The PC, obtained in the single cell, showed to have thicker layers than of the PC obtained in double electrochemical cell. Additionally, the PC obtained in double cell showed highest reflectance in the band gap region than of the PCs obtained in single cell. These results suggest that the interface roughness between adjacent layers in the PC devices obtained in double electrochemical cell is minimized. (C) 2008 Elsevier Ltd. All rights reserved.

Low-temperature deposition of silicon oxide and silicon nitride by reactive magnetron sputtering

In this study, oxide and nitride films were deposited at room temperature through the reaction of silicon Sputtered by argon and oxygen ions or argon and nitrogen ions at 250 and 350 W with 0.67 Pa pressure. It was observed that for both thin films the deposition rates increase with the applied RF power and decrease with the increase of the gas concentration. The Si/O and Si/N ratio were obtained through RBS analyses and for silicon oxide the values changed from 0.42 to 0.57 and for silicon nitride the Values changed from 0.4 to 1.03. The dielectric constants were calculated through capacitance-voltage curves with the silicon oxide values varying from 2.4 to 5.5, and silicon nitride values varying from 6.2 to 6.7, which are good options for microelectronic dielectrics. (c) 2008 Elsevier Ltd. All rights reserved.

Porous silicon optical cavity structure applied to high sensitivity organic solvent sensor

The present work reports the thermal annealing process, the number of layer and electrochemical process effect in the optical response quality of Bragg and microcavity devices that were applied as organic solvent sensors. These devices have been obtained by using porous silicon (PS) technology. The optical characterization of the Bragg reflector, before annealing, showed a broad photonic band-gap structure with blue shifted and narrowed after annealing process. The electrochemical process used to obtain the PS-based device imposes the limit in the number of layers because of the chemical dissolution effect. The interface roughness minimizations in the devices have been achieved by using the double electrochemical cell setup. The microcavity devices showed to have a good sensibility for organic solvent detection. The thermal annealed device showed better sensibility feature and this result was attributed to passivation of the surface devices. (c) 2007 Elsevier Ltd. All rights reserved.

Anodic porous alumina structural characteristics study based on SEM image processing and analysis

The present work reports the porous alumina structures fabrication and their quantitative structural characteristics study based on mathematical morphology analysis by using the SEM images. The algorithm used in this work was implemented in 6.2 MATLAB software. Using the algorithm it was possible to obtain the distribution of maximum, minimum and average radius of the pores in porous alumina structures. Additionally, with the calculus of the area occupied by the pores, it was possible to obtain the porosity of the structures. The quantitative results could be obtained and related to the process fabrication characteristics, showing to be reliable and promising to be used to control the pores formation process. Then, this technique could provide a more accurate determination of pore sizes and pores distribution. (C) 2008 Elsevier Ltd. All rights reserved.

Harmonic distortion analysis of double gate graded-channel MOSFETs operating in saturation

In this work we present an analysis of harmonic distortion (HD) in graded-channel (GC) gate-all-a round (GAA) devices operating in saturation region for analog applications. The study has been performed through device characterization and two-dimensional process and device simulations. The overall study has been done on the total and third order HDs. When applied in the saturation regime as an amplifier, the GC outperforms conventional GAA transistors presenting simultaneously higher transconductance, lower drain output conductance and more than 15 dB improved linearity. The influence of channel length reduction on the H D is also analyzed. Although slight linearity degradation is observed in both the conventional and the GC devices when reducing the channel length, the HD presented by the GC transistor is significantly lower than the one showed by conventional device for any Studied channel length. This allows AC input signal amplitude up to 20 times higher than the conventional GAA for a same specified distortion level. (C) 2008 Elsevier Ltd. All rights reserved.

Laser-assisted deposition of thin films from photoexcited vapour phases

Laser-assisted chemical vapour deposition (LCVD) has been extensively studied in the last two decades. A vast range of applications encompass various areas such as microelectronics, micromechanics, microelectromechanics and integrated optics, and a variety of metals, semiconductors and insulators have been grown by LCVD. In this article, we review briefly the LCVD process and present two case studies of thin film deposition related to laser thermal excitation (e.g., boron carbide) and non-thermal excitation (e.g., CrO(2)) of the gas phase.

An embedded 1149.4 extension to support mixed-signal debugging

Debugging electronic circuits is traditionally done with bench equipment directly connected to the circuit under debug. In the digital domain, the difficulties associated with the direct physical access to circuit nodes led to the inclusion of resources providing support to that activity, first at the printed circuit level, and then at the integrated circuit level. The experience acquired with those solutions led to the emergence of dedicated infrastructures for debugging cores at the system-on-chip level. However, all these developments had a small impact in the analog and mixed-signal domain, where debugging still depends, to a large extent, on direct physical access to circuit nodes. As a consequence, when analog and mixed-signal circuits are integrated as cores inside a system-on-chip, the difficulties associated with debugging increase, which cause the time-to-market and the prototype verification costs to also increase. The present work considers the IEEE1149.4 infrastructure as a means to support the debugging of mixed-signal circuits, namely to access the circuit nodes and also an embedded debug mechanism named mixed-signal condition detector, necessary for watch-/breakpoints and real-time analysis operations. One of the main advantages associated with the proposed solution is the seamless migration to the system-on-chip level, as the access is done through electronic means, thus easing debugging operations at different hierarchical levels.

A Design methodology for integrated inductor-based DC-DC converters

A design methodology for monolithic integration of inductor based DC-DC converters is proposed in this paper. A power loss model of the power stage, including the drive circuits, is defined in order to optimize efficiency. Based on this model and taking as reference a 0.35 mu m CMOS process, a buck converter was designed and fabricated. For a given set of operating conditions the defined power loss model allows to optimize the design parameters for the power stage, including the gate-driver tapering factor and the width of the power MOSFETs. Experimental results obtained from a buck converter at 100 MHz switching frequency are presented to validate the proposed methodology.

Liquid crystal beads constrained on thin cellulosic fibers: Electric field induced microrotors and N-I transition

We directly visualize the response of nematic liquid crystal drops of toroidal topology threaded in cellulosic fibers, suspended in air, to an AC electric field and at different temperatures over the N-I transition. This new liquid crystal system can exhibit non-trivial point defects, which can be energetically unstable against expanding into ring defects depending on the fiber constraining geometries. The director anchoring tangentially near the fiber surface and homeotropically at the air interface makes a hybrid shell distribution that in turn causes a ring disclination line around the main axis of the fiber at the center of the droplet. Upon application of an electric field, E, the disclination ring first expands and moves along the fiber main axis, followed by the appearance of a stable "spherical particle" object orbiting around the fiber at the center of the liquid crystal drop. The rotation speed of this particle was found to vary linearly with the applied voltage. This constrained liquid crystal geometry seems to meet the essential requirements in which soliton-like deformations can develop and exhibit stable orbiting in three dimensions upon application of an external electric field. On changing the temperature the system remains stable and allows the study of the defect evolution near the nematic-isotropic transition, showing qualitatively different behaviour on cooling and heating processes. The necklaces of such liquid crystal drops constitute excellent systems for the study of topological defects and their evolution and open new perspectives for application in microelectronics and photonics.

A multiplying-by-two CMOS amplifier for high-speed ADCs based on parametric amplification

15th International Conference on Mixed Design of Integrated Circuits and Systems, pp. 177 – 180, Poznan, Polónia

Parametric analog signal amplification applied to nanoscale cmos wireless digital transceivers

Thesis presented in partial fulfillment of the requirements for the degree of Doctor of Philosophy in the subject of Electrical and Computer Engineering by the Universidade Nova de Lisboa,Faculdade de Ciências e Tecnologia

Implementação de um sistema MPPT em circuito integrado CMOS

Dissertação de mestrado integrado em Engenharia Eletrónica Industrial e Computadores

MOVPE growth and characterisation of ZnO properties for optoelectronic applications

ZnO, Epitaxy, Metal organic vapor phase epitaxy, MOCVD, CVD, Semiconductor, Optoelectronics, X-ray diffraction, Cathodoluminescence, Microelectronics

La industria de los PCs en los mercados del continente americano: estimación de demanda y poder de mercado

Esta investigación aporta una visión panorámica del escenario competitivo de la industria de los PCs en los mercados del continente americano con mayor volumen de ventas. En él se describen los cambios producidos por el proceso de migración hacia la portabilidad que caracterizó el período 2005 - 2007. A partir de la estimación de un modelo de elección discreta Logit con coeficientes aleatorios, se recuperan los costes marginales a nivel de producto. A su vez, se desarrolla un análisis regional del ejercicio de poder de mercado por grupos de marcas basado en el Índice de Lerner, que revela que los cambios observados fueron gobernados principalmente por variaciones en la elasticidad-precio de la demanda. En particular, la incorporación de consumidores con una mayor elasticidad en el fragmento de portátiles en Latinoamérica podría explicar bajos niveles de poder de mercado (márgenes) en un contexto de precios a la baja y aumento de la demanda. Palabras clave: productos diferenciados, demanda, oligopolio, poder de mercado, Índice de Lerner, Logit con coeficientes aleatorios, PC. JEL: D12, F23, L13, L63.