A VLSI Architecture for Variable Block Size Video Motion Estimation

With the advent of new video standards such as MPEG-4 part-10 and H.264/H.26L, demands for advanced video coding, particularly in the area of variable block size video motion estimation (VBSME), are increasing. In this paper, we propose a new one-dimensional (1-D) very large-scale integration architecture for full-search VBSME (FSVBSME). The VBS sum of absolute differences (SAD) computation is performed by re-using the results of smaller sub-block computations. These are distributed and combined by incorporating a shuffling mechanism within each processing element. Whereas a conventional 1-D architecture can process only one motion vector (MV), this new architecture can process up to 41 MV sub-blocks (within a macroblock) in the same number of clock cycles.

Video games in the classrooms: implications of a disruptive innovation to develop the Multiple Intelligences

The present study aims to identify the framework of personal, organizational and technical variables that contribute to the viability and successful of innovative educational practices with video games within the school context to enhance the multiple intelligences. For this purpose, advantage was taken on the information previously collected through a questionnaire about the views, thoughts and experiences of a group of teachers of childhood and primary education (N=25) who voluntarily participated in a blended training activity from Center of Teachers (CEFIRE) of Valencia, around a community of practice aimed at promoting and advising projects for implementing educational video games in the classroom. The mixed methodology adopted has allowed the following: a) describe the relationship between their degree of development and daily use made of ICT in the classroom, their level of familiarity with video games,  their previous experience to integrate them for educational purposes..., and their participation in projects that focus on game-based learning; b) conduct content analysis of the opinions and thoughts expressed in a forum for teachers on innovation on and methodological strategies adopted reflected in a virtual board; and c) develop a SWOT analysis: Strengths, Weaknesses, Opportunities and Threats inherent in the implementation of experience with video games in the classroom. Among the conclusions, it is highlighted that, even though most did not have specific training or enough technological resources and the planning and implementation of innovation required them a great investment of time, their personal interest, the support given by members of the online community of practice, helped to encourage their activity, along with receptivity, positive attitude and high motivation of students with the experience. These aspects have been crucial to promote successful innovative practices with video games.

Approach to automatic video motion segmentation

A novel, fast automatic motion segmentation approach is presented. It differs from conventional pixel or edge based motion segmentation approaches in that the proposed method uses labelled regions (facets) to segment various video objects from the background. Facets are clustered into objects based on their motion and proximity details using Bayesian logic. Because the number of facets is usually much lower than the number of edges and points, using facets can greatly reduce the computational complexity of motion segmentation. The proposed method can tackle efficiently the complexity of video object motion tracking, and offers potential for real-time content-based video annotation.

Low-power systolic array processor architecture for FSBM video motion estimation

A novel power-efficient systolic array architecture is proposed for full search block matching (FSBM) motion estimation, where the partial distortion elimination algorithm is used to dynamically switch off the computation of eliminated partial candidate blocks. The RTL-level simulation shows that the proposed architecture can reduce the power consumption of the computation part of the algorithm to about 60% of that of the conventional 2D systolic arrays.

Reconfigurable video Motion Estimation processor

In this paper, a new reconfigurable multi-standard Motion Estimation (ME) architecture is proposed and a standard-cell based design study is presented. The architecture exhibits simpler control, high throughput and relative low hardware cost and is highly competitive when compared with existing designs for specific video standards. ©2007 IEEE.