Starting scheme for load commutated inverter-fed wound field synchronous machine using an auxiliary low-power voltage source inverter

Conventional thyristor-based load commutated inverter (LCI)-fed wound field synchronous machine operates only above a minimum speed that is necessary to develop enough back emf to ensure commutation. The drive is started and brought up to a speed of around 10-15% by a complex `dc link current pulsing' technique. During this process, the drive have problems such as pulsating torque, insufficient average starting torque, longer starting time, etc. In this regard a simple starting and low-speed operation scheme, by employing an auxiliary low-power voltage source inverter (VSI) between the LCI and the machine terminals, is presented in this study. The drive is started and brought up to a low speed of around 15% using the VSI alone with field oriented control. The complete control is then smoothly and dynamically transferred to the conventional LCI control. After the control transfer, the VSI is turned off and physically disconnected from the main circuit. The advantages of this scheme are smooth starting, complete control of torque and flux at starting and low speeds, less starting time, stable operation, etc. The voltage rating of the required VSI is very low of the order of 10-15%, whereas the current rating is dependent on the starting torque requirement of the load. The experimental results from a 15.8 hp LCI-fed wound field synchronous machine are given to demonstrate the scheme.

Circuits on cylinders

We consider the computational power of constant width polynomial size cylindrical circuits and non deterministic branching programs. We show that every function computed by a Pi(2) o MOD o AC(0) circuit can also be computed by a constant width polynomial size cylindrical nondeterministic branching program (or cylindrical circuit) and that every function computed by a constant width polynomial size cylindrical circuit belongs to ACC(0).

On synthesis of easily testable (k, K) circuits

A (k-, K) circuit is one which can be decomposed into nonintersecting blocks of gates where each block has no more than K external inputs, such that the graph formed by letting each block be a node and inserting edges between blocks if they share a signal line, is a partial k-tree. (k, K) circuits are special in that they have been shown to be testable in time polynomial in the number of gates in the circuit, and are useful if the constants k and K are small. We demonstrate a procedure to synthesise (k, K) circuits from a special class of Boolean expressions.

A Novel VSI- and CSI-Fed Dual Stator Induction Motor Drive Topology for Medium-Voltage Drive Applications

A new configuration is proposed for high-power induction motor drives. The induction machine is provided with two three-phase stator windings with their axes in line. One winding is designed for higher voltage and is meant to handle the main (active) power. The second winding is designed for lower voltage and is meant to carry the excitation (reactive) power. The excitation winding is powered by an insulated-gate-bipolar-transistor-based voltage source inverter with an output filter. The power winding is fed by a load-commutated current source inverter. The commutation of thyristors in the load-commutated inverter (LCI) is achieved by injecting the required leading reactive power from the excitation inverter. The MMF harmonics due to the LCI current are also cancelled out by injecting a suitable compensating component from the excitation inverter, so that the electromagnetic torque of the machine is smooth. Results from a prototype drive are presented to demonstrate the concept.

Synchronizing and Damping Torques Analysis of Nonlinear Voltage Regulators

This paper makes an attempt to assess the benefits of replacing a conventional generator excitation system (AVR + PSS) with a nonlinear voltage regulator using the concepts of synchronizing and damping torque components in a single machine infinite bus (SMIB) system. In recent years, there has been considerable interest in designing nonlinear excitation controllers, which are expected to give better dynamic performance over a wider range of system and operating conditions. The performance of these controllers is often justified by simulation studies on few test cases which may not adequately represent the diverse operating conditions of a typical power system. The performance of two such nonlinear controllers which are designed based on feedback linearization and include automatic voltage regulation with good dynamic performance have been analyzed using an SMIB model. Linearizing the nonlinear control laws along with the SMIB system equations, a Heffron Phillip's type of a model has been derived. Concepts of synchronizing and damping torque components have been used to show that such controllers can impair the small signal stability under certain operating conditions. This paper shows the possibility of negative damping contribution due to nonlinear voltage regulators and gives a new insight on understanding the physical impact of complex nonlinear control laws on power system dynamics.

A Nonlinear Voltage Regulator With One Tunable Parameter for Multimachine Power Systems

This paper proposes a nonlinear voltage regulator with one tunable parameter for multimachine power systems. Based on output feedback linearization, this regulator can achieve simultaneous voltage regulation and small-signal performance objectives. Conventionally output feedback linearization has been used for voltage regulator design by taking infinite bus voltage as reference. Unfortunately, this controller has poor small-signal performance and cannot be applied to multimachine systems without the estimation of the equivalent external reactance seen from the generator. This paper proposes a voltage regulator design by redefining the rotor angle at each generator with respect to the secondary voltage of the step-up transformer as reference instead of a common synchronously rotating reference frame. Using synchronizing and damping torques analysis, we show that the proposed voltage regulator achieves simultaneous voltage regulation and damping performance over a range of system and operating conditions by controlling the relative angle between the generator internal voltage angle delta and the secondary voltage of the step up transformer. The performance of the proposed voltage regulator is evaluated on a single machine infinite bus system and two widely used multimachine test systems.

An Investigation into the Dependence of the Arc Voltage on the Parameters of the Short-Circuit Current and the Design of the Vacuum Interrupter

The vacuum interrupter is extensively employed in the medium voltage switchgear for the interruption of the short-circuit current. The voltage across the arc during current interruption is termed as the arc voltage. The nature and magnitude of this arc voltage is indicative of the performance of the contacts and the vacuum interrupter as a whole. Also, the arc voltage depends on the parameters like the magnitude of short-circuit current, the arcing time, the point of opening of the contacts, the geometry and area of the contacts and the type of magnetic field. This paper investigates the dependency of the arc voltage on some of these parameters. The paper also discusses the usefulness of the arc voltage in diagnosing the performance of the contacts.

A low power, process invariant keeper design for high speed dynamic logic circuits

A low power keeper circuit using the concept of rate sensing has been proposed. The proposed technique reduces the amount of short circuit power dissipation in the domino gate by 70% compared to the conventional keeper technique. Also the total power-delay product is 26% lower compared to the previously reported techniques. The process tracking capability of the design enables the domino gate to achieve uniform delay across different process corners. This reduces the amount of short circuit power dissipation that occurs in the cascaded domino gates by 90%. The use of the proposed technique in the read path of a register file reduces the energy requirement by 26% as compared to the other keeper techniques. The proposed technique has been prototyped in 130nm CMOS technology.

Stabilizing a pulsed field emission from an array of carbon nanotubes

In this paper, we propose a new design configuration for a carbon nanotube (CNT) array based pulsed field emission device to stabilize the field emission current. In the new design, we consider a pointed height distribution of the carbon nanotube array under a diode configuration with two side gates maintained at a negative potential to obtain a highly intense beam of electrons localized at the center of the array. The randomly oriented CNTs are assumed to be grown on a metallic substrate in the form of a thin film. A model of field emission from an array of CNTs under diode configuration was proposed and validated by experiments. Despite high output, the current in such a thin film device often decays drastically. The present paper is focused on understanding this problem. The random orientation of the CNTs and the electromechanical interaction are modeled to explain the self-assembly. The degraded state of the CNTs and the electromechanical force are employed to update the orientation of the CNTs. Pulsed field emission current at the device scale is finally obtained by using the Fowler-Nordheim equation by considering a dynamic electric field across the cathode and the anode and integration of current densities over the computational cell surfaces on the anode side. Furthermore we compare the subsequent performance of the pointed array with the conventionally used random and uniform arrays and show that the proposed design outperforms the conventional designs by several orders of magnitude. Based on the developed model, numerical simulations aimed at understanding the effects of various geometric parameters and their statistical features on the device current history are reported.

Voltage and Temperature Scalable Standard Cell Leakage Models Based on Stacks for Statistical Leakage Characterization

With extensive use of dynamic voltage scaling (DVS) there is increasing need for voltage scalable models. Similarly, leakage being very sensitive to temperature motivates the need for a temperature scalable model as well. We characterize standard cell libraries for statistical leakage analysis based on models for transistor stacks. Modeling stacks has the advantage of using a single model across many gates there by reducing the number of models that need to be characterized. Our experiments on 15 different gates show that we needed only 23 models to predict the leakage across 126 input vector combinations. We investigate the use of neural networks for the combined PVT model, for the stacks, which can capture the effect of inter die, intra gate variations, supply voltage(0.6-1.2 V) and temperature (0 - 100degC) on leakage. Results show that neural network based stack models can predict the PDF of leakage current across supply voltage and temperature accurately with the average error in mean being less than 2% and that in standard deviation being less than 5% across a range of voltage, temperature.

Energy Reduction in SRAM using Dynamic Voltage and Frequency Management

This paper describes a dynamic voltage frequency control scheme for a 256 X 64 SRAM block for reducing the energy in active mode and stand-by mode. The DVFM control system monitors the external clock and changes the supply voltage and the body bias so as to achieve a significant reduction in energy. The behavioral model of the proposed DVFM control system algorithm is described and simulated in HDL using delay and energy parameters obtained through SPICE simulation. The frequency range dictated by an external controller is 100 MHz to I GHz. The supply voltage of the complete memory system is varied in steps of 50 mV over the range of 500 mV to IV. The threshold voltage range of operation is plusmn100 mV around the nominal value, achieving 83.4% energy reduction in the active mode and 86.7% in the stand-by mode. This paper also proposes a energy replica that is used in the energy monitor subsystem of the DVFM system.

Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations

We investigate the feasibility of developing a comprehensive gate delay and slew models which incorporates output load, input edge slew, supply voltage, temperature, global process variations and local process variations all in the same model. We find that the standard polynomial models cannot handle such a large heterogeneous set of input variables. We instead use neural networks, which are well known for their ability to approximate any arbitrary continuous function. Our initial experiments with a small subset of standard cell gates of an industrial 65 nm library show promising results with error in mean less than 1%, error in standard deviation less than 3% and maximum error less than 11% as compared to SPICE for models covering 0.9- 1.1 V of supply, -40degC to 125degC of temperature, load, slew and global and local process parameters. Enhancing the conventional libraries to be voltage and temperature scalable with similar accuracy requires on an average 4x more SPICE characterization runs.

Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations

We investigate the feasibility of developing a comprehensive gate delay and slew models which incorporates output load, input edge slew, supply voltage, temperature, global process variations and local process variations all in the same model. We find that the standard polynomial models cannot handle such a large heterogeneous set of input variables. We instead use neural networks, which are well known for their ability to approximate any arbitrary continuous function. Our initial experiments with a small subset of standard cell gates of an industrial 65 nm library show promising results with error in mean less than 1%, error in standard deviation less than 3% and maximum error less than 11% as compared to SPICE for models covering 0.9- 1.1 V of supply, -40degC to 125degC of temperature, load, slew and global and local process parameters. Enhancing the conventional libraries to be voltage and temperature scalable with similar accuracy requires on an average 4x more SPICE characterization runs.