Improvement of morphology, structure, and optical properties of GaAs nanowires grown on Si substrates

We investigate vertical and defect-free growth of GaAs nanowires on Si (111) substrates via a vapor-liquid-solid (VLS) growth mechanism with Au catalysts by metal-organic chemical vapor deposition (MOCVD). By using annealed thin GaAs buffer layers on the surface of Si substrates, most nanowires are grown on the substrates straight, following (111) direction; by using two temperature growth, the nanowires were grown free from structural defects, such as twin defects and stacking faults. Systematic experiments about buffer layers indicate that V/III ratio of precursor and growth temperature can affect the morphology and quality of the buffer layers. Especially, heterostructural buffer layers grown with different V/III ratios and temperatures and in-situ post-annealing step are very helpful to grow well arranged, vertical GaAs nanowires on Si substrates. The initial nanowires having some structural defects can be defect-free by two-temperature growth mode with improved optical property, which shows us positive possibility for optoelectronic device application. ©2010 IEEE.

Measuring the composition of AlGaN layers in GaN based structures grown on 150 mm Si substrates using (2 0 5) reciprocal space maps

A critical element for the successful growth of GaN device layers on Si is accurate control of the AlGaN buffer layers used to manage strain. Here we present a method for measuring the composition of the AlGaN buffer layers in device structures which makes use of a one-dimensional x-ray detector to provide efficient measurement of a reciprocal space map which covers the full compositional range from AlN to GaN. Combining this with a suitable x-ray reflection with low strain sensitivity it is possible to accurately determine the Al fraction of the buffer layers independent of their relaxation state. © 2013 IOP Publishing Ltd.

800V lateral IGBT in bulk Si for low power compact SMPS applications

An 800V rated lateral IGBT for high frequency, low-cost off-line applications has been developed. The LIGBT features a new method of adjusting the bipolar gain, based on a floating N+ stripe in front of the P+ anode/drain region. The floating N+ layer enhances the carrier recombination at the anode/drain side of the drift region resulting in a very significant decrease in the turn-off speed and substantially lower overall losses. Switching speeds as low as 140ns at 25oC and 300ns at 125oC have been achieved with corresponding equivalent Rdson at 125oC below 90mω.cm2. A fully operational AC-DC converter using a controller with an integrated LIGBT+depletion mode MOSFET chip has been designed and qualified in plastic SOP8 packages and used in 5W, 65kHz SMPS applications. The device is fabricated in 0.6μm bulk silicon CMOS technology without any additional masking steps. © 2013 IEEE.

Performance of hybrid buffer Poly(3,4-ethylenedioxythiophene) poly(styrenesulfonate) layers doped with plasmonic silver nanoparticles

We compare the performance of a typical hole transport layer for organic photovoltaics (OPVs), Poly(3,4-ethylenedioxythiophene) poly(styrenesulfonate) (PEDOT:PSS) thin film with a series of PEDOT:PSS layers doped with silver (Ag) nanoparticles (NPs) of various size distributions. These hybrid layers have attracted great attention as buffer layers in plasmonic OPVs, although there is no report up to date on their isolated performance. In the present study we prepared a series of PEDOT:PSS layers sandwiched between indium tin oxide (ITO) and gold (Au) electrodes. Ag NPs were deposited on top of the ITO by electron beam evaporation followed by spin coating of PEDOT:PSS. Electrical characterization performed in the dark showed linear resistive behavior for all the samples; lower resistance was observed for the hybrid ones. It was found that the resistivity of the samples decreases with increasing the particle's size. A substantial increase of the electric field between the ITO and the Au electrodes was seen through the formation of current paths through the Ag NPs. A striking observation is the slight increase in the slope of the current density versus voltage curves when measured under illumination for the case of the plasmonic layers, indicating that changes in the electric field in the vicinity of the NP due to plasmonic excitation is a non-vanishing factor. © 2014 Published by Elsevier B.V. All rights reserved.

Effects of AlGaN/AlN Stacked Interlayers on GaN Growth on Si (111)

We report the growth of high quality and crack-free GaN film on Si (111) substrate using Al0.2Ga0.8N/AlN stacked interlayers. Compared with the previously used single AlN interlayer, the AlGaN/AlN stacked interlayers can more effectively reduce the tensile stress inside the GaN layer. The cross-sectional TEM image reveals the bending and annihilation of threading dislocations (TDs) in the overgrown GaN film which leads to a decrease of TD density.

Electroluminescence from nano-crystalline Si/SiO2 structures embedded in pn junctions

Phosphorous-doped and boron-doped amorphous Si thin films as well as amorphous SiO2/Si/SiO2 sandwiched structures were prepared in a plasma enhanced chemical vapor deposition system. Then, the p-i-n structures containing nano-crystalline Si/SiO2 sandwiched structures as the intrinsic layer were prepared in situ followed by thermal annealing. Electroluminescence spectra were measured at room temperature under forward bias, and it is found that the electroluminescence intensity is strongly influenced by the types of substrate. The turn-on voltages can be reduced to 3 V for samples prepared on heavily doped p-type Si (p(+)-Si) substrates and the corresponding electroluminescence intensity is more than two orders of magnitude stronger than that on lightly doped p-type Si (p-Si) and ITO glass substrates. The improvements of light emission can be ascribed to enhanced hole injection and the consequent recombination of electron-hole pairs in the luminescent nanocrystalline Si/SiO2 system. (C) 2008 Elsevier Ltd. All rights reserved.

Study of GaN growth on ultra-thin Si membranes

10 mu m-thick ultra-thin Si (111) membranes for GaN epi-layers growth were successfully fabricated on silicon-on-insulator (SOI) substrate by backside etching the handle Si and buried oxide (BOX) layer. Then 1 mu m-thick GaN layers were deposited on these Si membranes by metal-organic chemical vapor deposition (MOCVD). The crack-free areas of 250 mu m, x 250 mu m were obtained on the GaN layers due to the reduction of thermal stress by using these ultra-thin Si membranes, which was further confirmed by the photoluminescence (PL) spectra and the simulation results from the finite element method calculation by using the software of ANSYS. In this paper, a newly developed approach was demonstrated to utilize micromechanical structures for GaN growth, which would improve the material quality of the epi-layers and facilitate GaN-based micro electro-mechanical system (MEMS) fabrication, especially the pressure sensor, in the future applications. (C) 2008 Elsevier Ltd. All rights reserved.

Enhancement of electroluminescence in p-i-n structures with nano-crystalline Si/SiO2 multilayers

Nano-crystalline Si/SiO2 multilayers were prepared by alternately changing the ultra-thin amorphous Si film deposition and the in situ plasma oxidation process followed by the post-annealing treatments. Well-defined periodic structures can be achieved with 2.5 nm thick SiO2 sublayers. It is shown that the size of formed nano-crystalline Si is about 3 nm. Room temperature electroluminescence can be observed and the spectrum contains two luminescence bands located at 650 nm and 520 nm. In order to improve the hole injection probability, p-i-n structures containing a nanocrystalline Si/SiO2 luminescent layer were designed and fabricated on different p-type substrates. It is found that the turn-on voltage of p-i-n structures is obviously reduced and the luminescence intensity increases by 50 times. It is demonstrated that the use of a heavy-doped p-type substrate can increase the luminescence intensity more efficiently compared with the light-doped p-type substrate due to the enhanced hole injection.

Growth and characterization of AlGaN/GaN heterostructure using unintentionally doped AlN/GaN superlattices as barrier layer

AlGaN/GaN heterostructure using unintentionally doped AlN/GaN superlattices (SLs) as barrier layer is grown on C-plane sapphire by metal organic vapor deposition (MOCVD). Compared with the conventional Si-doped structure, electrical property is improved. An average sheet resistance of 287.1 Omega/square and high resistance uniformity of 0.82% are obtained across the 2-inch epilayer wafer with an equivalent Al composition of 38%. Hall measurement shows that the mobility of two-dimensional electron gas (2DEG) is 1852 cm(2)/V s with a sheet carrier density of 1.2 x 10(13) cm(-2) at room temperature. The root mean square roughness (RMS) value is 0.159 nm with 5 x 5 mu m(2) scan area and the monolayer steps are clearly observed. The reason for the property improvement is discussed. (c) 2008 Elsevier Ltd. All rights reserved.

Fabrication of low-cost and high-reflectivity bottom mirrors for Si-based micro-cavity devices

A novel and simple way to prepare high-reflectivity bottom mirrors for Si-based micro-cavity devices is reported. The bottom mirror was deposited in the hole, which was etched from the backside of the sample by ethylenediamine-pyrocatechol-water solution with the buried Sio, layer in the silicon-on-insulator substrate as the etching-stop layer. The high-reflectivity of the bottom mirror deposited in the hole and the narrow hill width at half maximum of the cavity formed by this method both indicate the successful preparation of the bottom mirror for Si-based micro-cavity devices.

The compact microcrystalline Si thin film with structure uniformity in the growth direction by hydrogen dilution profile

The hydrogen dilution profiling (HDP) technique has been developed to improve the quality and the crystalline uniformity in the growth direction of mu c-Si:H thin films prepared by hot-wire chemical-vapor deposition. The high H dilution in the initial growth stage reduces the amorphous transition layer from 30-50 to less than 10 nm. The uniformity of crystalline content X-c in the growth direction was much improved by the proper design of hydrogen dilution profiling which effectively controls the nonuniform transition region of Xc from 300 to less than 30 nm. Furthermore, the HDP approach restrains the formation of microvoids in mu c-Si: H thin films with a high Xc and enhances the compactness of the film. As a result the stability of mu c-Si: H thin films by HDP against the oxygen diffusion, as well as the electrical property, is much improved. (c) 2005 American Institute of Physics.

Computer simulation of a-Si : H/mu c-Si : H diphasic silicon solar cells

Based on our experimental research on diphasic silicon films, the parameters such as absorption coefficient, mobility lifetime product and bandgap were estimated by means of effective-medium theory. And then computer simulation of a-Si: H/mu c-Si: H diphasic thin film solar cells was performed. It was shown that the more crystalline fraction in the diphasic silicon films, the higher short circuit density, the lower open-circuit voltage and the lower efficiency. From the spectral response, we can see that the response in long wave region was improved significantly with increasing crystalline fraction in the silicon films. Taking Lambertian back refraction into account, the diphasic silicon films with 40%-50% crystalline fraction was considered to be the best intrinsic layer for the bottom solar cell in micromorph tandem.

Epitaxial SiC grown on silicon-on-insulator substrate with ultra-thin silicon-over-layer

We report on the comparative studies of epitaxial SiC films grown on silicon-on-insulator (SOI) and Si bulk substrates. The silicon-over-layer (SOL) on the SOI has been thinned down to different thicknesses, with the thinnest about 10 nm. It has been found that the full-width-at-half-maxim in the X-ray diffraction spectrum from the SiC films decreases as the SOL thickness decreases, indicating improved quality of the SiC film. A similar trend has also been found in the Raman spectrum. One of the potential explanations for the observation is strain accommodation by the ultra-thin SOI substrate. (c) 2005 Elsevier B.V. All rights reserved.

Characterization of stress induced in SOS and Si/gamma-Al2O3/Si heteroepitaxial thin films by Raman spectroscopy

Raman spectroscopy technique has been performed to investigate the stress induced in as-grown silicon-on-sapphire (SOS), solid-phase-epitaxy (SPE) re-grown SOS, and Si/gamma-Al2O3/Si double-heteroepitaxial thin films. It was demonstrated that the residual stress in SOS film, arising from mismatch and difference of thermal expansion coefficient between silicon and sapphire, was reduced efficiently by SPE process, and that the stress in Si/gamma-Al2O3/Si thin film is much smaller than that of as-grown SOS and SPE upgraded SOS films. The stress decrease for double heteroepitaxial film Si/gamma-Al2O3/Si mainly arises from the smaller lattice mismatching of 2.4% between silicon top layer and the gamma-Al2O3/Si epitaxiial composite substrate, comparing with the large lattice mismatch of 13% for SOS films. It indicated that gamma-Al2O3/Si as a silicon-based epitaxial substrate benefits for reducing the residual stress for further growth of silicon layer, compared with on bulk sapphire substrate. (c) 2005 Elsevier B.V. All rights reserved.

Design of the low-temperature AlN interlayer for GaN grown on Si(111) substrate

We have investigated the effect of the thickness and layer number of the low-temperature A1N interlayer (LT-A1N IL) on the stress relaxation and the crystal quality of GaN epilayers grown on Si (111) substrate by metalorganic chemical vapor deposition. It is found that the stress decreases with the increase of the LT-AIN IL thickness, but the crystal quality of the GaN epilayer goes worse quickly when the LT-AIN IL thickness is larger than 16 nm. This is because the increase of the LT-AIN IL thickness will increase the coalescence thickness of its upper GaN layer, which sensitively affects the crystal quality of the epilayer. Using multiple LT-AIN ILs is an effective method not only to reduce the stress, but also to improve the crystal quality of the GaN epilayer. With the increase of the interlayer number, the probability that dislocations are blocked increases and the probability that dislocations are produced at interfaces decreases. Thus, dislocations in the most upper part of GaN are reduced, resulting in the improvement of the crystal quality. Finally, it is suggested that when the total thickness of the epilayer is fixed, both the thickness and the number of the LT-AIN IL should be carefully designed to reduce the stress and improve the crystal quality of the epilayer simultaneously. (c) 2004 Elsevier B.V.. All rights reserved.