995 resultados para hardware design
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A good system of preventive bridge maintenance enhances the ability of engineers to manage and monitor bridge conditions, and take proper action at the right time. Traditionally infrastructure inspection is performed via infrequent periodical visual inspection in the field. Wireless sensor technology provides an alternative cost-effective approach for constant monitoring of infrastructures. Scientific data-acquisition systems make reliable structural measurements, even in inaccessible and harsh environments by using wireless sensors. With advances in sensor technology and availability of low cost integrated circuits, a wireless monitoring sensor network has been considered to be the new generation technology for structural health monitoring. The main goal of this project was to implement a wireless sensor network for monitoring the behavior and integrity of highway bridges. At the core of the system is a low-cost, low power wireless strain sensor node whose hardware design is optimized for structural monitoring applications. The key components of the systems are the control unit, sensors, software and communication capability. The extensive information developed for each of these areas has been used to design the system. The performance and reliability of the proposed wireless monitoring system is validated on a 34 feet span composite beam in slab bridge in Black Hawk County, Iowa. The micro strain data is successfully extracted from output-only response collected by the wireless monitoring system. The energy efficiency of the system was investigated to estimate the battery lifetime of the wireless sensor nodes. This report also documents system design, the method used for data acquisition, and system validation and field testing. Recommendations on further implementation of wireless sensor networks for long term monitoring are provided.
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Joukkoliikenteen merkitys suurten ihmismäärien liikuttamisessa on kasvanut. Kaupunkikeskustat ovat monin paikoin ruuhkautuneet ja joukkoliikenteestä pyritään tekemään mahdollisimman houkuttelevaa ruuhkien helpottamiseksi. Yksi keino houkutella ihmisiä joukkoliikennevälineiden käyttäjiksi on parantaa matkustajille tarjottavan informaation määrää ja laatua. Matkustajainformaatiojärjestelmä on monipuolinen kokonaisuus, jolla joukkoliikenteen käyttäjälle tarjotaan muun muassa opastusta, aikataulutietoa ja häiriötietoa. Informaatio voi olla staattista kuten painetut aikataulut ja kiinteät opasteet tai dynaamista kuten reaaliaikaiset näytöt ja kuulutukset. Informaatiota voidaan tarjota matkustajan käyttöön niin kotona ja liikenneasemilla kuin liikkuvassa kalustossakin. Matkustajainformaatiojärjestelmiä on käytössä erilaisissa joukkoliikennevälineissä, joista tässä diplomityössä syvennytään raideliikenteeseen. Työssä suunnitellaan ja toteutetaan raideliikenteen vaatimukset täyttävä IP-pohjainen audiovahvistin. Valmis vahvistin liittyy Ethernet-verkon välityksellä raideliikenteen matkustajainformaatio-järjestelmään. Laite toimii kuulutus- ja puhelinjärjestelmän keskusyksikkönä. Työn tuloksena saatiin toimiva ja sarjatuotantokelpoinen audiovahvistin. Laitteen tyyppitestit ovat tätä työtä palautettaessa vielä kesken, mutta tähän mennessä testit ovat menneet hyvin ja laite on toiminut hyvin myös osana järjestelmää.
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The thesis studies possibility of using embedded controller in a crane application and furthermore defines requirements when designing such a controller. Basic crane control architectures are considered and compared. Then embedded controller product life cycle is described: considering such issues like microcontroller selection, software/hardware design and application development tools. Finally, available embedded controller is described and used for implementing crane control.
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Sulautettujen järjestelmien projekti voidaan toteuttaa monella tavalla. Projektiin liittyy aina ohjelmiston, sekä laitteiston kehittäminen. Ohjelmiston suunnittelulla on suuri painoarvo ja tämä näkyy erityisesti varsinkin kulutuselektroniikassa. Kannettavien laitteiden räjähdysmäisesti lisääntynyt myynti ja käyttö ovat tuoneet markkinoille lisää rahaa ja mielenkiintoa. Tästä johtuen markkinoille tulee joka vuosi entistä kehittyneempiä laitteita. Laitteiston kehittymisen sekä asiakkaiden vaatimusten lisääntyessä ohjelmistojen koko on kasvanut. Tämä on luonut tarpeen myös sulautettujen järjestelmien projekteille ottaa käyttöön jokin tietty metodi ohjelmistojen tuotannossa. Ongelmana on kuitenkin se, että sulautettujen järjestelmien projekteihin on sovellettu metodeita, joita ei ole alun perin suunniteltu laitteiston ja ohjelmiston yhteissuunnitteluun ja toteuttamiseen. Miten voidaan valita oikea metodi sulautettujen järjestelmien projektiin? Tässä työssä esitellään perinteisiä ohjelmistotuotannon metodeita, sekä keskitytään eri ketterien metodien tutkimiseen. Tämä työ selvittää mikä vaikuttaa metodin valintaan sulautetun järjestelmän projektille. Tässä tutkimuksessa päädytään siihen johtopäätökseen, että sulautetuin järjestelmän suunnittelussa ja toteutuksessa ketterien menetelmien käyttö parantaa projektin mahdollisuutta onnistua täyttämään asiakkaan vaatimukset. Ketterien menetelmien käyttö ei poista tarvetta kehittää menetelmää, joka lähtökohtaisesti ottaa huomioon laitteiston ja ohjelmiston yhteissuunnittelun.
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This research work deals with the problem of modeling and design of low level speed controller for the mobile robot PRIM. The main objective is to develop an effective educational tool. On one hand, the interests in using the open mobile platform PRIM consist in integrating several highly related subjects to the automatic control theory in an educational context, by embracing the subjects of communications, signal processing, sensor fusion and hardware design, amongst others. On the other hand, the idea is to implement useful navigation strategies such that the robot can be served as a mobile multimedia information point. It is in this context, when navigation strategies are oriented to goal achievement, that a local model predictive control is attained. Hence, such studies are presented as a very interesting control strategy in order to develop the future capabilities of the system
Resumo:
The real-time monitoring of events in an industrial plant is vital, to monitor the actual conditions of operation of the machinery responsible for the manufacturing process. A predictive maintenance program includes condition monitoring of the rotating machinery, to anticipate possible conditions of failure. To increase the operational reliability it is thus necessary an efficient tool to analyze and monitor the equipments, in real-time, and enabling the detection of e.g. incipient faults in bearings. To fulfill these requirements some innovations have become frequent, namely the inclusion of vibration sensors or stator current sensors. These innovations enable the development of new design methodologies that take into account the ease of future modifications, upgrades, and replacement of the monitored machine, as well as expansion of the monitoring system. This paper presents the development, implementation and testing of an instrument for vibration monitoring, as a possible solution to embed in industrial environment. The digital control system is based on an FPGA, and its configuration with an open hardware design tool is described. Special focus is given to the area of fault detection in rolling bearings. © 2012 IEEE.
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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
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[EN] This project briefly analyzes the scope and applications of Industrial Robotics, as well as the importance that this technical discipline has gained in the past decades. In addition, it proposes a modern platform to assist in teaching this discipline in colleges and universities. This new educational platform for the teaching of Industrial Robotics is based on the robotic systems from Rhino Robotics Ltd., using the existing robotic arms and replacing the control electronics by a newer, modern and yet backwards-compatible controller. In addition to the controller, this platform also provides new, up-to-date software utilities that are more intuitive than those provided with the old system. The work to be done consists essentially in receiving commands from a personal computer which the controller must interpret in order to control the motors of the robotic arm. The controller itself will be implemented as an embedded system based on microcontrollers. This requires the implementation of a communication protocol between the personal computer and the microcontroller, the design of a command interpreter, the design of the electronics for motor control using PWM and H-bridges, and the implementation of control techniques (more precisely, PID control). Hence, this project combines software and hardware design and integration techniques with motor control techniques and feedback control methods from Control Engineering, along with the kinematic analysis of the Rhino XR-4 robotic arm.
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This thesis explores system performance for reconfigurable distributed systems and provides an analytical model for determining throughput of theoretical systems based on the OpenSPARC FPGA Board and the SIRC Communication Framework. This model was developed by studying a small set of variables that together determine a system¿s throughput. The importance of this model is in assisting system designers to make decisions as to whether or not to commit to designing a reconfigurable distributed system based on the estimated performance and hardware costs. Because custom hardware design and distributed system design are both time consuming and costly, it is important for designers to make decisions regarding system feasibility early in the development cycle. Based on experimental data the model presented in this paper shows a close fit with less than 10% experimental error on average. The model is limited to a certain range of problems, but it can still be used given those limitations and also provides a foundation for further development of modeling reconfigurable distributed systems.
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En este proyecto se desarrolla un sistema electrónico para variar la geometría de un motor de un monoplaza que participa en la competición Fórmula SAE. Fórmula SAE es una competición de diseño de monoplazas para estudiantes, organizado por “Society of Automotive Enginners” (SAE). Este concurso busca la innovación tecnológica de la automoción, así como que estudiantes participen en un trabajo real, en el cual el objetivo es obtener resultados competitivos cumpliendo con una serie de requisitos. La variación de la geometría de un motor en un vehículo permite mejorar el rendimiento del monoplaza consiguiendo elevar el par de potencia del motor. Cualquier mejora en del vehículo en un ámbito de competición puede resultar determinante en el desenlace de la misma. El objetivo del proyecto es realizar esta variación mediante el control de la longitud de los tubos de admisión de aire o “runners” del motor de combustión, empleando un motor lineal paso a paso. A partir de la información obtenida por sensores de revoluciones del motor de combustión y la posición del acelerador se debe controlar la distancia de dichos tubos. Integrando este sistema en el bus CAN del vehículo para que comparta la información medida al resto de módulos. Por todo esto se realiza un estudio aclarando los aspectos generales del objetivo del trabajo, para la comprensión del proyecto a realizar, las posibilidades de realización y adquisición de conocimientos para un mejor desarrollo. Se presenta una solución basada en el control del motor lineal paso a paso mediante el microcontrolador PIC32MX795F512-L. Dispositivo del fabricante Microchip con una arquitectura de 32 bits. Este dispone de un módulo CAN integrado y distintos periféricos que se emplean en la medición de los sensores y actuación sobre el motor paso a paso empleando el driver de Texas Instruments DRV8805. Entonces el trabajo se realiza en dos líneas, una parte software de programación del control del sistema, empleando el software de Microchip MPLABX IDE y otra parte hardware de diseño de una PCB y circuitos acondicionadores para la conexión del microcontrolador, con los sensores, driver, motor paso a paso y bus CAN. El software empleado para la realización de la PCB es Orcad9.2/Layout. Para la evaluación de las medidas obtenidas por los sensores y la comprobación del bus CAN se emplea el kit de desarrollo de Microchip, MCP2515 CAN Bus Monitor Demo Board, que permite ver la información en el bus CAN e introducir tramas al mismo. ABSTRACT. This project develops an electronic system to vary the geometry of a car engine which runs the Formula SAE competition. Formula SAE is a design car competition for students, organized by "Society of Automotive Engineers" (SAE). This competition seeks technological innovation in the automotive industry and brings in students to participate in a real job, in which the objective is to obtain competitive results in compliance with certain requirements. Varying engine’s geometry in a vehicle improves car’s performance raising engine output torque. Any improvement in the vehicle in a competition field can be decisive in the outcome of it. The goal of the project is the variation by controlling the length of the air intake pipe or "runners" in a combustion engine, using a linear motor step. For these, uses the information gathered by speed sensors from the combustion engine and by the throttle position to control the distance of these tubes. This system is integrated in the vehicle CAN bus to share the information with the other modules. For all this is made a study to clarify the general aspects of the project in order to understand the activities developed inside the project, the different options available and also, to acquire knowledge for a better development of the project. The solution is based on linear stepper motor control by the microcontroller PIC32MX795F512-L. Device from manufacturer Microchip with a 32-bit architecture. This module has an integrated CAN various peripherals that are used in measuring the performance of the sensors and drives the stepper motor using Texas Instruments DRV8805 driver. Then the work is done in two lines, first, control programming software system using software MPLABX Microchip IDE and, second, hardware design of a PCB and conditioning circuits for connecting the microcontroller, with sensors, driver stepper motor and CAN bus. The software used to carry out the PCB is Orcad9.2/Layout. For the evaluation of the measurements obtained by the sensors and CAN bus checking is used Microchip development kit, MCP2515 CAN Bus Monitor Demo Board, that allows you to see the information on the CAN bus and enter new frames in the bus.
Resumo:
Como apoyo al Subsistema ECM tradicional de los sistemas de Guerra Electrónica, surge el Equipo de Seguimiento en Elevación cuyo fin es la búsqueda de la amenaza en elevación. Ante la necesidad de un mayor número de líneas entre los bloques internos de este Equipo de Seguimiento, se hace necesario el diseño de una Tarjeta de Interfaz y Control. La tarjeta se ocupará de realizar el control de datos y flujo de señales de módulos RF que componen el Equipo, haciendo de interfaz entre las Tarjetas Procesadoras y Digitalizadoras, así como entre la Tarjeta de Proceso y el Bloque de Recepción. Una vez que se haya realizado el análisis de la necesidad de controlar estas señales, estudiado las especificaciones y los requisitos funcionales del Sistema, se procederá a implementar el diseño hardware y desarrollo firmware de la Tarjeta de Interfaz y Control de un Equipo de Seguimiento en Elevación para un Subsistema ECM, que constituye el objetivo de este PFC. ABSTRACT. In order to find a threat on elevation, and as a support on the basic ECM subsystems of E-war systems, the Elevation Tracking Equipment appears. To the need of a bigger number of lines between inside blocks of this Tracking Equipment, the design of an Interface and Control Board is needed. This board will deal with the data control and with the flow of RF modules signals that set up the Equipment, and will also work as an interface between the Processing and Digitalizing Board, as well as between the Process Board and the Reception Block. Once the signal control necessity analysis has been made, and once the specifications and functional System requirements have been studied, the hardware design and the firmware development will be ran as a target of PFC.
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Image processing offers unparalleled potential for traffic monitoring and control. For many years engineers have attempted to perfect the art of automatic data abstraction from sequences of video images. This paper outlines a research project undertaken at Napier University by the authors in the field of image processing for automatic traffic analysis. A software based system implementing TRIP algorithms to count cars and measure vehicle speed has been developed by members of the Transport Engineering Research Unit (TERU) at the University. The TRIP algorithm has been ported and evaluated on an IBM PC platform with a view to hardware implementation of the pre-processing routines required for vehicle detection. Results show that a software based traffic counting system is realisable for single window processing. Due to the high volume of data required to be processed for full frames or multiple lanes, system operations in real time are limited. Therefore specific hardware is required to be designed. The paper outlines a hardware design for implementation of inter-frame and background differencing, background updating and shadow removal techniques. Preliminary results showing the processing time and counting accuracy for the routines implemented in software are presented and a real time hardware pre-processing architecture is described.
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The voltage source inverter (VSI) and current voltage source inverter (CSI) are widely used in industrial application. But the traditional VSIs and CSIs have one common problem: can’t boost or buck the voltage come from battery, which make them impossible to be used alone in Hybrid Electric Vehicle (HEV/EV) motor drive application, other issue is the traditional inverter need to add the dead-band time into the control sequence, but it will cause the output waveform distortion. This report presents an impedance source (Z-source network) topology to overcome these problems, it can use one stage instead of two stages (VSI or CSI + boost converter) to buck/boost the voltage come from battery in inverter system. Therefore, the Z-source topology hardware design can reduce switching element, entire system size and weight, minimize the system cost and increase the system efficiency. Also, a modified space vector pulse-width modulation (SVPWM) control method has been selected with the Z-source network together to achieve the best efficiency and lower total harmonic distortion (THD) at different modulation indexes. Finally, the Z-source inverter controlling will modulate under two control sequences: sinusoidal pulse width modulation (SPWM) and SVPWM, and their output voltage, ripple and THD will be compared.
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The memory hierarchy is the main bottleneck in modern computer systems as the gap between the speed of the processor and the memory continues to grow larger. The situation in embedded systems is even worse. The memory hierarchy consumes a large amount of chip area and energy, which are precious resources in embedded systems. Moreover, embedded systems have multiple design objectives such as performance, energy consumption, and area, etc. Customizing the memory hierarchy for specific applications is a very important way to take full advantage of limited resources to maximize the performance. However, the traditional custom memory hierarchy design methodologies are phase-ordered. They separate the application optimization from the memory hierarchy architecture design, which tend to result in local-optimal solutions. In traditional Hardware-Software co-design methodologies, much of the work has focused on utilizing reconfigurable logic to partition the computation. However, utilizing reconfigurable logic to perform the memory hierarchy design is seldom addressed. In this paper, we propose a new framework for designing memory hierarchy for embedded systems. The framework will take advantage of the flexible reconfigurable logic to customize the memory hierarchy for specific applications. It combines the application optimization and memory hierarchy design together to obtain a global-optimal solution. Using the framework, we performed a case study to design a new software-controlled instruction memory that showed promising potential.