CMOS indoor light energy harvesting system for wireless sensing applications

Dissertação para obtenção do Grau de Doutor em Engenharia Electrotécnica e de Computadores

An improved trap design for decoupling multinuclear RF coils.

PURPOSE: Multinuclear magnetic resonance spectroscopy and imaging require a radiofrequency probe capable of transmitting and receiving at the proton and non-proton frequencies. To minimize coupling between probe elements tuned to different frequencies, LC (inductor-capacitor) traps blocking current at the (1) H frequency can be inserted in non-proton elements. This work compares LC traps with LCC traps, a modified design incorporating an additional capacitor, enabling control of the trap reactance at the low frequency while maintaining (1) H blocking. METHODS: Losses introduced by both types of trap were analysed using circuit models. Radiofrequency coils incorporating a series of LC and LCC traps were then built and evaluated at the bench. LCC trap performance was then confirmed using (1) H and (13) C measurements in a 7T human scanner. RESULTS: LC and LCC traps both effectively block interaction between non-proton and proton coils at the proton frequency. LCC traps were found to introduce a sensitivity reduction of 5±2%, which was less than half of that caused by LC traps. CONCLUSION: Sensitivity of non-proton coils is critical. The improved trap design, incorporating one extra capacitor, significantly reduces losses introduced by the trap in the non-proton coil. Magn Reson Med 72:584-590, 2014. © 2013 Wiley Periodicals, Inc.

Analysis and Design of an Adaptive Polynomial Predistorter with the Loop Delay Estimator

Most adaptive linearization circuits for the nonlinear amplifier have a feedback loop that returns the output signal oj'tne eunplifier to the lineurizer. The loop delay of the linearizer most be controlled precisely so that the convergence of the linearizer should be assured lot this Letter a delay control circuit is presented. It is a delay lock loop (ULL) with it modified early-lute gate and can he easily applied to a DSP implementation. The proposed DLL circuit is applied to an adaptive linearizer with the use of a polynomial predistorter, and the simulalion for a 16-QAM signal is performed. The simulation results show that the proposed DLL eliminates the delay between the reference input signal and the delayed feedback signal of the linearizing circuit perfectly, so that the predistorter polynomial coefficients converge into the optimum value and a high degree of linearization is achieved

Comparison of Reactive Power Support in Distribution Networks Provided by Capacitor Banks and Distributed Generators

This paper presents a comparison of reactive power support in distribution networks provided by switched Capacitor Banks (CBs) and Distributed Generators (DGs). Regarding switched CBs, a Tabu Search metaheuristic algorithm is developed to determine their optimal operation with the objective of reducing the power losses in the lines on the system, while meeting network constraints. on the other hand, the optimal operation of DGs is analyzed through an evolutionary Multi-Objective (MO) programming approach. The objectives of such approach are the minimization of power losses and operation cost of the DGs. The comparison of the reactive power support provided by switched CBs and DGs is carried out using a modified IEEE 34 bus distribution test system.

Alocação otimizada de bancos de capacitores em sistemas de distribuição de energia elétrica através de metaheurísticas multiobjetivo

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Desenvolvimento de um conversor estático PWM para o acionamento de LED’S para iluminação publica

This work deals with the development of a switched-mode power supply circuit based on a Buck topology converter with a Boost Rectifier One-Cycle Control with Power Factor Correction developing, thus, a source of direct current for a module of 50 power LEDs that will be used in a lamp for public street lightning. It is presented, at first, some aspects about the most common technologies used in lamps of public street lightning in Brazil and a comparison with the White LED high power, which is the one that presents itself as the most promising among the existing market. Then it is presented the detailed development of the static converter switched PWM, consisting of a Boost rectifier with power factor correction and methodology of control One-Cycle Control associated with a Buck converter controlled by a PI method that operates as a direct current source . At the end of the simulation results of the circuit through the PSIM software are presented to verify the design behavior

Holistic Design In High-Speed Optical Interconnects

Integrated circuit scaling has enabled a huge growth in processing capability, which necessitates a corresponding increase in inter-chip communication bandwidth. As bandwidth requirements for chip-to-chip interconnection scale, deficiencies of electrical channels become more apparent. Optical links present a viable alternative due to their low frequency-dependent loss and higher bandwidth density in the form of wavelength division multiplexing. As integrated photonics and bonding technologies are maturing, commercialization of hybrid-integrated optical links are becoming a reality. Increasing silicon integration leads to better performance in optical links but necessitates a corresponding co-design strategy in both electronics and photonics. In this light, holistic design of high-speed optical links with an in-depth understanding of photonics and state-of-the-art electronics brings their performance to unprecedented levels. This thesis presents developments in high-speed optical links by co-designing and co-integrating the primary elements of an optical link: receiver, transmitter, and clocking.

In the first part of this thesis a 3D-integrated CMOS/Silicon-photonic receiver will be presented. The electronic chip features a novel design that employs a low-bandwidth TIA front-end, double-sampling and equalization through dynamic offset modulation. Measured results show -14.9dBm of sensitivity and energy efficiency of 170fJ/b at 25Gb/s. The same receiver front-end is also used to implement source-synchronous 4-channel WDM-based parallel optical receiver. Quadrature ILO-based clocking is employed for synchronization and a novel frequency-tracking method that exploits the dynamics of IL in a quadrature ring oscillator to increase the effective locking range. An adaptive body-biasing circuit is designed to maintain the per-bit-energy consumption constant across wide data-rates. The prototype measurements indicate a record-low power consumption of 153fJ/b at 32Gb/s. The receiver sensitivity is measured to be -8.8dBm at 32Gb/s.

Next, on the optical transmitter side, three new techniques will be presented. First one is a differential ring modulator that breaks the optical bandwidth/quality factor trade-off known to limit the speed of high-Q ring modulators. This structure maintains a constant energy in the ring to avoid pattern-dependent power droop. As a first proof of concept, a prototype has been fabricated and measured up to 10Gb/s. The second technique is thermal stabilization of micro-ring resonator modulators through direct measurement of temperature using a monolithic PTAT temperature sensor. The measured temperature is used in a feedback loop to adjust the thermal tuner of the ring. A prototype is fabricated and a closed-loop feedback system is demonstrated to operate at 20Gb/s in the presence of temperature fluctuations. The third technique is a switched-capacitor based pre-emphasis technique designed to extend the inherently low bandwidth of carrier injection micro-ring modulators. A measured prototype of the optical transmitter achieves energy efficiency of 342fJ/bit at 10Gb/s and the wavelength stabilization circuit based on the monolithic PTAT sensor consumes 0.29mW.

Lastly, a first-order frequency synthesizer that is suitable for high-speed on-chip clock generation will be discussed. The proposed design features an architecture combining an LC quadrature VCO, two sample-and-holds, a PI, digital coarse-tuning, and rotational frequency detection for fine-tuning. In addition to an electrical reference clock, as an extra feature, the prototype chip is capable of receiving a low jitter optical reference clock generated by a high-repetition-rate mode-locked laser. The output clock at 8GHz has an integrated RMS jitter of 490fs, peak-to-peak periodic jitter of 2.06ps, and total RMS jitter of 680fs. The reference spurs are measured to be –64.3dB below the carrier frequency. At 8GHz the system consumes 2.49mW from a 1V supply.

Comando de ondulador de tensão trifásico por PWM e técnica U/F com implementação por microcontrolador

Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Electrónica Industrial

Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback

IEEE International Symposium on Circuits and Systems, pp. 2258 – 2261, Seattle, EUA

Controlo de conversores de potência genéricos por FPGA

Dissertação para obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e Eletrónica Industrial

Projecto de um circuito conversor DC-DC para aplicações de “energy harvest”

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do grau de Mestre em Engenharia Electrotécnica e de Computadores

Pipelined analog-to-digital conversion using current-mode reference shifting

Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica e de Computadores

Gender and weight shape brain dynamics during food viewing.

Hemodynamic imaging results have associated both gender and body weight to variation in brain responses to food-related information. However, the spatio-temporal brain dynamics of gender-related and weight-wise modulations in food discrimination still remain to be elucidated. We analyzed visual evoked potentials (VEPs) while normal-weighted men (n = 12) and women (n = 12) categorized photographs of energy-dense foods and non-food kitchen utensils. VEP analyses showed that food categorization is influenced by gender as early as 170 ms after image onset. Moreover, the female VEP pattern to food categorization co-varied with participants' body weight. Estimations of the neural generator activity over the time interval of VEP modulations (i.e. by means of a distributed linear inverse solution [LAURA]) revealed alterations in prefrontal and temporo-parietal source activity as a function of image category and participants' gender. However, only neural source activity for female responses during food viewing was negatively correlated with body-mass index (BMI) over the respective time interval. Women showed decreased neural source activity particularly in ventral prefrontal brain regions when viewing food, but not non-food objects, while no such associations were apparent in male responses to food and non-food viewing. Our study thus indicates that gender influences are already apparent during initial stages of food-related object categorization, with small variations in body weight modulating electrophysiological responses especially in women and in brain areas implicated in food reward valuation and intake control. These findings extend recent reports on prefrontal reward and control circuit responsiveness to food cues and the potential role of this reactivity pattern in the susceptibility to weight gain.

Liikesimulaattorialustan kehittäminen virtuaaliprototyypin avulla

Työn tarkoituksena oli kehittää kuuden vapausasteen liikesimulaattorialusta virtuaaliprototyypin avulla siten, että alustan dynamiikka mallinnetaan Adams-ohjelmistolla ja ohjaus- ja säätöpiiri Matlab Simulink:llä. Tarkoituksena oli tutkia dynaamisen mallin ja säätöteknisen mallin yhdistämistä ja niiden yhteen toimimista. Tarkoituksena oli myös selvittää tulevaisuudessa rakennettavan Stewart:n alustan mekaniikan mitat ja hydraulikomponenttien koot. Työssä tutkittiin alustan käyttäytymistä halutulla liikealueella, nopeuksia joita saavutetaan ja mekaanisia rajoitteita. Työn tuloksesta on tarkoitus rakentaa fyysinen prototyyppi liittyen KONSI-projektiin, jossa kehitetään satamanosturisimulaattori nosturiohjaajan koulutuksen tueksi. Malli tullaan kytkemään Teppo Lehtisen diplomityönä tehtyyn satamanosturi kontin simulointimalliin ja koko järjestelmän on tarkoitus toimia reaaliaikaisena.

Kolmen vapausasteen akseliston ohjaaminen mikroprosessorilla

Diplomityön tavoitteena on tehdä lasertyöasemalle liikkuva kolmen vapausasteen akselisto liikuttamaan laser-laitteiston skanneripäätä. Liikkeen tarkkuus ja tarkka toistettavuus ovat tärkeitä. Moottoreiden liikkeen nopeus sekä kiihdytys- ja jarrutusparametrien täytyy olla määriteltävissä jokaiselle moottorille erikseen. Kolmen vapausasteen akselisto muodostetaan käyttäen kolmea askelmoottoria ja lineaarivaihteistoa. Akselisto liikkuu vaaka-, pysty-, ja syvyyssuunnassa. Työssä kehitetään C-kielinen ohjelma käytettävälle prosessorille ja suunnitellaan ohjainkortti lopullista prototyyppiä varten. Moottoreiden ohjaus ja hallinta toteutetaan AT91S256-prosessorilla, jota ohjataan tietokoneen avulla RS-232 -väylää käyttäen. Vaatimuksena on myös mahdollisuus ohjata askelmoottorin sijasta servomoottoreita samalla ohjelmalla. Tietokoneen käyttöliittymä suunnitellaan erikseen.