Silicon light emitting devices in CMOS technology

Two silicon light emitting devices with different structures are realized in standard 0.35 mu m complementary metal-oxide-semiconductor (CMOS) technology. They operate in reverse breakdown mode and can be turned on at 8.3 V. Output optical powers of 13.6 nW and 12.1 nW are measured at 10 V and 100 mA, respectively, and both the calculated light emission intensities are more than 1 mW/Cm-2. The optical spectra of the two devices are between 600-790 nm with a clear peak near 760 nm..

A novel fast lock-in phase-locked loop frequency synthesizer with direct frequency presetting circuit

This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.

A high-performance Si-based MOS electrooptic phase modulator with a shunt-capacitor configuration

A novel Si-based metal-oxide-semiconductor (MOS) electrooptic phase modulator including two shunt oxide layer capacitors integrated on a silicon-on-insulator (SOI) waveguide is simulated and analyzed. The refractive index near the two gate oxide layers is modified by the free carrier dispersion effect induced by applying a positive bias on the electrodes. The theoretical calculation of free carrier distribution coupled with optical guided mode propagation characteristics has been carried out. The influence of the structure parameters such as the width and the doping level of the active region are analyzed. A half-wave voltage V-pi = 4 V is demonstrated with an 8-mm active region length and a 4-mu m width of an inner rib under an accumulation mode. When decreasing the inner rib width to 1 mu m, the phase modulation efficiency is even higher, and the rise and fall times reach 50 and 40 ps, respectively, with a 1.0 x 10(17) cm(-3) doping level in the active region.

A 1Gb/s silicon photo-receiver in standard CMOS for 850-nm optical communication

A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) was designed and fabricated with standard 0.6 mu m CMOS technology. This OEIC circuit consisted of an integrated double photodiode detector (DPD) and a preamplifier. The DPD detector exhibited high bandwidth by screening the bulk-generated diffusion carriers and suppressing the slow diffusion tail effect. The preamplifier exploited the regulated cascode (RGC) configuration as the input stage of receiver, thus isolating the influence of photodiode capacitance and input parasitic capacitance on bandwidth. Testing results showed that the bandwidth of OEIC was 700MHz, indicating the bit rate of 1Gb/s was achieved.

Recent progresses of SOI-based photonic devices - art. no. 60201R

SOI (Silicon on Insulator) based photonic devices, including stimulated emission from Si diode, RCE (Resonant Cavity Enhanced) photodiode with quantum structure, MOS (Metal Oxide Semiconductor) optical modulator with high frequency, SOI optical matrix switch and wavelength tunable filter are reviewed in the paper. The emphasis will be played on our recent results of SOI-based thermo-optic waveguide matrix switch with low insertion loss and fast response. A folding re-arrangeable non-blocking 4x4 matrix switch with total internal reflection (TIR) mirrors and a first blocking 16 x 16 matrix were fabricated on SOI wafer. The extinction ratio and the crosstalk are better. The insertion loss and the polarization dependent loss (PDL) at 1.55 mu m increase slightly with longer device length and more bend and intersecting waveguides. The insertion losses are expected to decrease 2-3 dB when anti-reflection films are added in the ends of the devices. The rise and fall times of the devices are 2.1 mu s and 2.3 mu s, respectively.

A novel fast lock-in phase-locked loop frequency synthesizer with direct frequency presetting circuit

This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.

Synthesis Gas Generation by Chemical-Looping Reforming Using Ce-Based Oxygen Carriers Modified with Fe, Cu, and Mn Oxides

Chemical-looping reforming (CLR) is a technology that can be used for partial oxidation and steam reforming of hydrocarbon fuels. It involves the use of a metal oxide as an oxygen carrier, which transfers oxygen from combustion air to the fuel. Composite oxygen carriers of cerium oxide added with Fe, Cu, and Mn oxides were prepared by co-precipitation and investigated in a thermogravimetric analyzer and a fixed-bed reactor using methane as fuel and air as oxidizing gas. It was revealed that the addition of transition-metal oxides into cerium oxide can improve the reactivity of the Ce-based oxygen carrier. The three kinds of mixed oxides showed high CO and H-2 selectivity at above 800 degrees C. As for the Ce-Fe-O oxygen carrier, methane was converted to synthesis gas at a H-2/CO molar ratio close to 2:1 at a temperature of 800-900 degrees C; however, the methane thermolysis reaction was found on Ce-Cu-O and Ce-Mn-O oxygen carriers at 850-900 degrees C. Among the three kinds of oxygen carriers, Ce-Fe-O presented the best performance for methane CLR. On Ce-Fe-O oxygen carriers, the CO and H-2 selectivity decreased as the Fe content increased in the carrier particles. An optimal range of the Ce/Fe molar ratio is Ce/Fe > 1 for Ce-Fe-O oxygen carriers. Scanning electron microscopy (SEM) analysis revealed that the microstructure of the Ce-Fe-O oxides was not dramatically changed before and after 20 cyclic reactions. A small amount of Fe3C was found in the reacted Ce-Fe-O oxides by X-ray diffraction (XRD) analysis.

A High-Performance Silicon Electro-Optic Phase Modulator with a Triple MOS Capacitor

We propose and analyze a novel Si-based electro-optic modulator with an improved metal-oxide-semiconductor (MOS) capacitor configuration integrated into silicon-on-insulator (SOI).Three gate-oxide layers embedded in the silicon waveguide constitute a triple MOS capacitor structure,which boosts the modulation efficiency compared with a single MOS capacitor.The simulation results demonstrate that the VπLπ product is 2.4V·cm.The rise time and fall time of the proposed device are calculated to be 80 and 40ps from the transient response curve,respectively,indicating a bandwidth of 8GHz.The phase shift efficiency and bandwidth can be enhanced by rib width scaling.

SOI光波导高速电光调制器的研究进展

介绍了不同截面大小的SOI(silicon-on-insulator)波导单模条件,详细描述了几种降低传输损耗,消除偏振相关,提高耦合效率的技术手段.分析比较了一种带有MOS(metal-oxide-semiconductor)电容结构和一种具有微环结构的高速电光调制器,其调制频率分别达到10和1.5GHz.

Combined single-pass conversion of methane via oxidative coupling and dehydroaromatization

A new reaction mode, i.e., the combined single-pass conversion of methane via oxidative coupling (OCM) over mixed metal oxide (SLC) catalysts and dehydroaromatization (MDA) over Mo/HZSM-5 catalysts, is reported. With the assistance of an OCM reaction over SLC catalysts in the top layer of the reactor, the deactivation resistance of Mo/HZSM-5 catalysts is remarkably enhanced. Under the selected reaction conditions, the CH(4) conversion decreased from similar to18 to similar to1% and the aromatics yield decreased from 12.8 to 0.1%, respectively, after running the reaction for 960 min on both 6Mo/HZSM-5 and SLC-6Mo/HZSM-5 catalyst system without O(2) in the feed. On the other hand, for the SLC-6Mo/HZSM-5 catalyst system with O(2) in the feed, the deactivation was improved greatly, and after 960 min onstream the CH(4) conversion and aromatics yield were still as high as 12.0 and 8.0%, respectively. The promotion effect mainly appears to be associated with in situ formation of CO(2) in the OCM layer, which reacts with coke via the reverse Boudouard reaction.

p-p isotype organic heterojunction and ambipolar field-effect transistors

We realized ambipolar transport behavior in field-effect transistors by using p-p isotype heterojunction films as active layers, which consisted of two p-type semiconductor materials, 2, 2'; 7', 2 ''-terphenanthrenyl (Ph3) and vanadyl-phthalocyanine (VOPc). The ambipolar charge transport was attributed to the interfacial electronic structure of Ph3-VOPc isotype heterojunction, and electrons and holes were accumulated at both sides of the narrow band-gap VOPc and the wide band-gap Ph3, respectively, which were confirmed by the capacitance-voltage relationship of metal-oxide-semiconductor diodes. The accumulation thickness of carriers was also obtained by changing the heterojunction active layer thickness. Furthermore, the results indicate that the device performance is relative to interfacial electronic structures.