424 resultados para DSP


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New compensation methods are presented that can greatly reduce the slit errors (i.e. transition location errors) and interval errors induced due to non-idealities in optical incremental encoders (square-wave). An M/T-type, constant sample-time digital tachometer (CSDT) is selected for measuring the velocity of the sensor drives. Using this data, three encoder compensation techniques (two pseudoinverse based methods and an iterative method) are presented that improve velocity measurement accuracy. The methods do not require precise knowledge of shaft velocity. During the initial learning stage of the compensation algorithm (possibly performed in-situ), slit errors/interval errors are calculated through pseudoinversebased solutions of simple approximate linear equations, which can provide fast solutions, or an iterative method that requires very little memory storage. Subsequent operation of the motion system utilizes adjusted slit positions for more accurate velocity calculation. In the theoretical analysis of the compensation of encoder errors, encoder error sources such as random electrical noise and error in estimated reference velocity are considered. Initially, the proposed learning compensation techniques are validated by implementing the algorithms in MATLAB software, showing a 95% to 99% improvement in velocity measurement. However, it is also observed that the efficiency of the algorithm decreases with the higher presence of non-repetitive random noise and/or with the errors in reference velocity calculations. The performance improvement in velocity measurement is also demonstrated experimentally using motor-drive systems, each of which includes a field-programmable gate array (FPGA) for CSDT counting/timing purposes, and a digital-signal-processor (DSP). Results from open-loop velocity measurement and closed-loop servocontrol applications, on three optical incremental square-wave encoders and two motor drives, are compiled. While implementing these algorithms experimentally on different drives (with and without a flywheel) and on encoders of different resolutions, slit error reductions of 60% to 86% are obtained (typically approximately 80%).

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Explicit finite difference (FD) schemes can realise highly realistic physical models of musical instruments but are computationally complex. A design methodology is presented for the creation of FPGA-based micro-architectures for FD schemes which can be applied to a range of applications with varying computational requirements, excitation and output patterns and boundary conditions. It has been applied to membrane and plate-based sound producing models, resulting in faster than real-time performance on a Xilinx XC2VP50 device which is 10 to 35 times faster than general purpose and DSP processors. The models have developed in such a way to allow a wide range of interaction (by a musician) thereby leading to the possibility of creating a highly realistic digital musical instrument.

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The technical challenges in the design and programming of signal processors for multimedia communication are discussed. The development of terminal equipment to meet such demand presents a significant technical challenge, considering that it is highly desirable that the equipment be cost effective, power efficient, versatile, and extensible for future upgrades. The main challenges in the design and programming of signal processors for multimedia communication are, general-purpose signal processor design, application-specific signal processor design, operating systems and programming support and application programming. The size of FFT is programmable so that it can be used for various OFDM-based communication systems, such as digital audio broadcasting (DAB), digital video broadcasting-terrestrial (DVB-T) and digital video broadcasting-handheld (DVB-H). The clustered architecture design and distributed ping-pong register files in the PAC DSP raise new challenges of code generation.

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In DSP applications such as fixed transforms and filtering, the full flexibility of a general-purpose multiplier is not required and only a limited range of values is needed on one of the multiplier inputs. A new design technique has been developed for deriving multipliers that operate on a limited range of multiplicands. This can be used to produce FPGA implementations of DSP systems where area is dramatically improved. The paper describes the technique and its application to the design of a poly-phase filter on a Virtex FPGA. A 62% area reduction and 7% speed increase is gained when compared to an equivalent design using general purpose multipliers. It is also compared favourably to other known fixed coefficient approaches.

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A rapid analytical optical biosensor-based immunoassay was developed and validated for the detection of okadaic acid (OA) and its structurally related toxins from shellfish matrix. The assay utilizes a monoclonal antibody which binds to the OA group of toxins in order of their toxicities, resulting in a pseudofunctional assay. Single-laboratory validation of the assay for quantitative detection of OA determined that it has an action limit of 120 mu g/kg, a limit of detection of 31 mu g/kg, and a working range of 31-174 mu g/kg. The midpoint on the standard matrix calibration curve is 80 mu g/kg, half the current regulatory limit. Inter- and intra-assay studies of negative mussel samples spiked with various OA concentrations produced average coefficient of variation (CV) and standard deviation (SD) values of 7.9 and 10.1, respectively. The assay was also validated to confirm the ability to accurately codetect and quantify dinophysistoxin-1 (DTX-1), DTX-2, and DTX-3 from shellfish matrix. Alkaline hydrolysis was not required for the detection of DTX-3 from matrix. Excellent correlations with the data generated by the biosensor method and liquid chromatography/tandem mass spectrometry (LC/MS/MS) were obtained using a certified reference material (R-2 = 0.99), laboratory reference material, and naturally contaminated mussel samples (R-2 = 0.97). This new procedure could be used as a rapid screening procedure replacing animal-based tests for DSP toxins.

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Estimation and detection of the hemodynamic response (HDR) are of great importance in functional MRI (fMRI) data analysis. In this paper, we propose the use of three H 8 adaptive filters (finite memory, exponentially weighted, and time-varying) for accurate estimation and detection of the HDR. The H 8 approach is used because it safeguards against the worst case disturbances and makes no assumptions on the (statistical) nature of the signals [B. Hassibi and T. Kailath, in Proc. ICASSP, 1995, vol. 2, pp. 949-952; T. Ratnarajah and S. Puthusserypady, in Proc. 8th IEEE Workshop DSP, 1998, pp. 1483-1487]. Performances of the proposed techniques are compared to the conventional t-test method as well as the well-known LMSs and recursive least squares algorithms. Extensive numerical simulations show that the proposed methods result in better HDR estimations and activation detections.

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The mouse bioassay is the methodology that is most widely used to detect okadaic acid (OA) in shellfish samples. This is one of the best-known toxins, and it belongs to the family of marine biotoxins referred to as the diarrhetic shellfish poisons (DSP). Due to animal welfare concerns, alternative methods of toxin detection are being sought. A rapid and specific biosensor immunoassay method was developed and validated for the detection of OA. An optical sensor instrument based on the surface plasmon resonance (SPR) phenomenon was utilised. A polyclonal antibody to OA was raised against OA-bovine thyroglobulin conjugate and OA-N-hydroxy succinimide ester was immobilised onto an amine sensor chip surface. The assay parameters selected for the analysis of the samples were: antibody dilution, 1/750; ratio of antibody to standard, 1:1; volume of sample injected, 25 mu l min(-1); flow rate, 25 mu l min(-1). An assay action limit of 126 ng g(-1) was established by analysing of 20 shellfish samples spiked with OA at the critical concentration of 160 ng g(-1), which is the action limit established by the European Union (EU). At this concentration of OA, the assay delivered coefficient of variations (CVs) of

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Odontoblasts form the outermost cellular layer of the dental pulp where they have been proposed to act as sensory receptor cells. Despite this suggestion, evidence supporting their direct role in mediating thermo-sensation and nociception is lacking. Transient receptor potential (TRP) ion channels directly mediate nociceptive functions, but their functional expression in human odontoblasts has yet to be elucidated. In the present study, we have examined the molecular and functional expression of thermo-sensitive TRP channels in cultured odontoblast-like cells and in native human odontoblasts obtained from healthy wisdom teeth. PCR and western blotting confirmed gene and protein expression of TRPV1, TRPA1 and TRPM8 channels. Immunohistochemistry revealed that these channels were localised to odontoblast-like cells as determined by double staining with dentin sialoprotein (DSP) antibody. In functional assays, agonists of TRPV1, TRPA1 and TRPM8 channels elicited [Ca2+]i transients that could be blocked by relevant antagonists. Application of hot and cold stimuli to the cells also evoked rises in [Ca2+]i which could be blocked by TRP-channel antagonists. Using a gene silencing approached we further confirmed a role for TRPA1 in mediating noxious cold responses in odontoblasts. We conclude that human odontoblasts express functional TRP channels that may play a crucial role in mediating thermal sensation in teeth. Cultured and native human odontoblasts express functional TRP channels that may play a crucial role in mediating thermal sensation in teeth.

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In this paper, we present a methodology for implementing a complete Digital Signal Processing (DSP) system onto a heterogeneous network including Field Programmable Gate Arrays (FPGAs) automatically. The methodology aims to allow design refinement and real time verification at the system level. The DSP application is constructed in the form of a Data Flow Graph (DFG) which provides an entry point to the methodology. The netlist for parts that are mapped onto the FPGA(s) together with the corresponding software and hardware Application Protocol Interface (API) are also generated. Using a set of case studies, we demonstrate that the design and development time can be significantly reduced using the methodology developed.

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The initial part of this paper reviews the early challenges (c 1980) in achieving real-time silicon implementations of DSP computations. In particular, it discusses research on application specific architectures, including bit level systolic circuits that led to important advances in achieving the DSP performance levels then required. These were many orders of magnitude greater than those achievable using programmable (including early DSP) processors, and were demonstrated through the design of commercial digital correlator and digital filter chips. As is discussed, an important challenge was the application of these concepts to recursive computations as occur, for example, in Infinite Impulse Response (IIR) filters. An important breakthrough was to show how fine grained pipelining can be used if arithmetic is performed most significant bit (msb) first. This can be achieved using redundant number systems, including carry-save arithmetic. This research and its practical benefits were again demonstrated through a number of novel IIR filter chip designs which at the time, exhibited performance much greater than previous solutions. The architectural insights gained coupled with the regular nature of many DSP and video processing computations also provided the foundation for new methods for the rapid design and synthesis of complex DSP System-on-Chip (SoC), Intellectual Property (IP) cores. This included the creation of a wide portfolio of commercial SoC video compression cores (MPEG2, MPEG4, H.264) for very high performance applications ranging from cell phones to High Definition TV (HDTV). The work provided the foundation for systematic methodologies, tools and design flows including high-level design optimizations based on "algorithmic engineering" and also led to the creation of the Abhainn tool environment for the design of complex heterogeneous DSP platforms comprising processors and multiple FPGAs. The paper concludes with a discussion of the problems faced by designers in developing complex DSP systems using current SoC technology. © 2007 Springer Science+Business Media, LLC.

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An overview is given of a systolic VLSI compiler (SVC) tool currently under development for the automated design of high performance digital signal processing (DSP) chips. Attention is focused on the design of systolic vector quantization chips for use in both speech and image coding systems. The software in question consists of a cell library, silicon assemblers, simulators, test pattern generators, and a specially designed graphics shell interface which makes it expandable and user friendly. It allows very high performance digital coding systems to be rapidly designed in VLSI.

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The presence of paralytic shellfish poisoning (PSP), diarrheic shellfish poisoning (DSP) and amnesic shellfish poisoning (ASP) toxins in seafood is a severe and growing threat to human health. In order to minimize the risks of human exposure, the maximum content of these toxins in seafood has been limited by legal regulations worldwide. The regulated limits are established in equivalents of the main representatives of the groups: saxitoxin (STX), okadaic acid (OA) and domoic acid (DA), for PSP, DSP and ASP, respectively. In this study a multi-detection method to screen shellfish samples for the presence of these toxins simultaneously was developed. Multiplexing was achieved using a solid-phase microsphere assay coupled to flow-fluorimetry detection, based on the Luminex xMap technology. The multi-detection method consists of three simultaneous competition immunoassays. Free toxins in solution compete with STX, OA or DA immobilized on the surface of three different classes of microspheres for binding to specific monoclonal antibodies. The IC50 obtained in buffer was similar in single- and multi-detection: 5.6 ± 1.1 ng/mL for STX, 1.1 ± 0.03 ng/mL for OA and 1.9 ± 0.1 ng/mL for DA. The sample preparation protocol was optimized for the simultaneous extraction of STX, OA and DA with a mixture of methanol and acetate buffer. The three immunoassays performed well with mussel and scallop matrixes displaying adequate dynamic ranges and recovery rates (around 90 % for STX, 80 % for OA and 100 % for DA). This microsphere-based multi-detection immunoassay provides an easy and rapid screening method capable of detecting simultaneously in the same sample three regulated groups of marine toxins.

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Protein G-coated magnetic particles (MPs) were used as immobilisation supports for an antibody against okadaic acid (MAb(OA)) and carriers into a surface plasmon resonance (SPR) device for the development of a direct competitive immunosensor for okadaic acid (OA). SPR analysis of MAb(OA)-MP conjugates demonstrated that conjugations were successful with complete immobilisation of all the antibody biomolecules onto the MPs. Moreover, MAb(OA)-MP conjugates provided up to 11-fold higher SPR signals, compared to free MAb(OA). The use of conjugates in the direct competition assay provided a 3-fold lower LOD mu g/L (2.6 mu g of OA/L, equivalent to 12 mu g of OA/kg mussel meat). The presence of mussel matrix did not interfere in the OA quantification as seen in the calibration curves. Mussel samples, obtained from Ebro Delta's bays (NW Mediterranean) during a diarrheic shellfish poisoning (DSP) event and in the presence of Dinophysis sacculus, an OA producer, in the shellfish production area, were analysed with the MP-based SPR immunosensor. The OA contents correlated with those obtained by liquid chromatography-tandem mass spectrometry (LC-MS/MS) (y = 0.984x -5.273, R-2 = 0.789, p <0.001) and by mouse bioassay (MBA).

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Due to the intermittent nature of renewable generation it is desirable to consider the potential of controlling the demand-side load to smooth overall system demand. The architecture and control methodologies of such a system on a large scale would require careful consideration. Some of these considerations are discussed in this paper; such as communications infrastructure, systems architecture, control methodologies and security. A domestic fridge is used in this paper as an example of a controllable appliance. A layered approach to smart-grid is introduced and it can be observed how each smart-grid component from physical cables, to the end-devices (or smart-applications) can be mapped to these set layers. It is clear how security plays an integral part in each component of the smart-grid so this is also an integral part of each layer. The controllable fridge is described in detail and as one potential smart-grid application which maps to the layered approach. A demonstration system is presented which involves a Raspberry Pi (a low-power, low-cost device representing the appliance controller).