A novel single-phase hpf hybrid rectifier suitable for front-end trolleybus systems

This paper proposal presents the development and the experimental analysis of a new single-phase hybrid rectifier structure with high power factor (PF) and low harmonic distortion of current (THDI), suitable for application in traction systems of electrical vehicles pulled by electrical motors (trolleybus), which are powered by urban distribution network. This front-end rectifier structure is capable of providing significant improvements in trolleybuses systems and in the urban distribution network costs, and efficiency. The proposed structure is composed by an ordinary single-phase diode rectifier with parallel connection of a switched converter. It is outlined that the switched converter is capable of composing the input line current waveform assuring high power factor (HPF) and low THDI, as well as ordinary front-end converter. However, the power rating of the switched converter is about 34% of the total output power, assuring robustness and reliability. Therefore, the proposed structure was named single-phase HPF hybrid rectifier. A prototype rated at 15kW was developed and analyzed in laboratory. It was found that the input line current harmonic spectrum is in accordance with the harmonic limits imposed by IEC61000-3-4. The principle of operation, the mathematical analysis, the PWM control strategy, and experimental results of a 15kW prototype are also presented in this paper. © 2009 IEEE.

Proposal of a hybrid rectifier structure with HPF and low THD suitable for front-end trolleybuses systems supplied by AC distribution networks

This paper presents the development and the experimental analysis of a new single-phase hybrid rectifier structure with high power factor (PF) and low harmonic distortion of current (THDI), suitable for application in traction systems of electrical vehicles pulled by electrical motors (trolleybus), which are powered by urban distribution network. This front-end rectifier structure is capable of providing significant improvements in trolleybuses systems and in the urban distribution network costs, and efficiency. The proposed structure is composed by an ordinary single-phase diode rectifier with parallel connection of a switched converter. It is outlined that the switched converter is capable of composing the input line current waveform assuring high power factor (HPF) and low THDI, as well as ordinary front-end converter. However, the power rating of the switched converter is about 34% of the total output power, assuring robustness and reliability. Therefore, the proposed structure was named single-phase HPF hybrid rectifier. A prototype rated at 15kW was developed and analyzed in laboratory. It was found that the input line current harmonic spectrum is in accordance with the harmonic limits imposed by IEC61000-3-4. The principle of operation, the mathematical analysis, the PWM control strategy, and experimental results are also presented in this paper. © 2009 IEEE.

DCM Boost interleaved converter for operation in AC and DC to trolleybus application

This paper is based on the development and experimental analysis of a DCM Boost interleaved converter suitable for application in traction systems of electrical vehicles pulled by electrical motors (Trolleybus), which are powered by urban DC or AC distribution networks. This front-end structure is capable of providing significant improvements in trolleybuses systems and in the urban distribution network costs, and efficiency. The architecture of proposed converter is composed by five boost power cells in interleaving connection, operating in discontinuous conduction mode. Furthermore, the converter can operate as AC-DC converter, or as DC-DC converter providing the proper DC output voltage range required by DC or AC adjustable speed drivers. Therefore, when supplied by single-phase AC distribution networks, and operating as AC-DC converter, it is capable to provide high power factor, reduced harmonic distortion in the input current, complying with the restrictions imposed by the IEC 61000-3-4 standards. The digital controller has been implemented using a low cost FPGA and developed totally using a hardware description language VHDL and fixed point arithmetic. Thus, two control strategies are evaluated considering the compliance with input current restrictions imposed by IEC 61000-3-4 standards, the regular PWM modulation and a current correction PWM modulation. In order to verify the feasibility and performance of the proposed system, experimental results from a 15 kW low power scale prototype are presented, operating in DC and AC conditions.

The CMS experiment at the CERN LHC

The Compact Muon Solenoid (CMS) detector is described. The detector operates at the Large Hadron Collider (LHC) at CERN. It was conceived to study proton-proton (and lead-lead) collisions at a centre-of-mass energy of 14 TeV (5.5 TeV nucleon-nucleon) and at luminosities up to 10(34)cm(-2)s(-1) (10(27)cm(-2)s(-1)). At the core of the CMS detector sits a high-magnetic-field and large-bore superconducting solenoid surrounding an all-silicon pixel and strip tracker, a lead-tungstate scintillating-crystals electromagnetic calorimeter, and a brass-scintillator sampling hadron calorimeter. The iron yoke of the flux-return is instrumented with four stations of muon detectors covering most of the 4 pi solid angle. Forward sampling calorimeters extend the pseudo-rapidity coverage to high values (vertical bar eta vertical bar <= 5) assuring very good hermeticity. The overall dimensions of the CMS detector are a length of 21.6 m, a diameter of 14.6 m and a total weight of 12500 t.

Design of a LNA and a Gilbert Cell Mixer MMICs with a GaAsPHEMT technology

The design of a Gilbert Cell Mixer and a low noise amplifier (LNA), using GaAs PHEMT technology is presented. The compatibility is shown for co-integration of both block on the same chip, to form a high performance 1.9 GHz receiver front end. The designed LNA shows 9.23 dB gain and 2.01 dB noise figure (NF). The mixer is designed to operate at RF=1.9 GHz, LO=2.0 GHz and IF=100 MHz with a gain of 14.3 dB and single sideband noise figure (SSB NF) of 9.6 dB. The mixer presents a bandwith of 8 GHz.

Design of a LNA and a Gilbert Cell Mixer MMICs with a GaAs PHEMT technology

The design of a Gilbert Cell Mixer and a low noise amplifier (LNA), using GaAs PHEMT technology is presented. The compatibility is shown for co-integration of both block on the same chip, to form a high performance 1.9 GHz receiver front-end. The designed LNA shows 9.23 dB gain and 2.01 dB noise figure (NF). The mixer is designed to operate at RF=1.9 GHz, LO=2.0 GHz and IF=100 MHz with a gain of 14.3 dB and single sideband noise figure (SSB NF) of 9.6 dB. The mixer presents a bandwith of 8 GHz.

Towards a java bytecodes compiler for nios II soft-core processor

Reconfigurable computing is one of the most recent research topics in computer science. The Altera - Nios II soft-core processor can be included in a large set of reconfigurable architectures, especially because it is designed in software, allowing it to be configured according to the application. The recent growth in applications that demand reconfigurable computing made necessary the building of compilers that translate high level languages source codes into reconfigurable devices instruction sets. In this paper we present a compiler that takes as input the bytecodes generated by a Java front-end compiler and generates a set of instructions that attends to the Nios II processor instruction set rules. Our work shows how we process Java bytecodes to the intermediate code, in the Nios II instructions format, and build the control flow and the control dependence graphs. © 2009 IEEE.

HPF boost interleaved operating in discontinuous conduction mode for trolleybus application

This paper deals with results of a research and development (R&D) project in cooperation with Electric Power Distribution Company in São Paulo (Brazil) regarding the development and experimental analysis of a new concept of power drive system suitable for application in traction systems of electrical vehicles pulled by electrical motors, which can be powered by urban DC or AC distribution networks. The proposed front-end structure is composed by five boost power cells in interleaving connection, operating in discontinuous conduction mode as AC-DC converter, or as DC-DC converter, in order to provide the proper DC output voltage range required by DC or AC adjustable speed drivers. Therefore, when supplied by single-phase AC distribution networks, and operating as AC-DC converter, it is capable to provide high power factor, reduced harmonic distortion in the input current, complying with the restrictions imposed by the IEC 61000-3-4 standards resulting in significant improvements for the trolleybuses systems efficiency and for the urban distribution network costs. Considering the compliance with input current restrictions imposed by IEC 61000-3-4 standards, two digital control strategies were evaluated. The digital controller has been implemented using a low cost FPGA (XC3S200) and developed totally using a hardware description language VHDL and fixed point arithmetic. Experimental results from a 15 kW low power scale prototype operating in DC and AC conditions are presented, in order to verify the feasibility and performance of the proposed system. © 2009 IEEE.

ENCORE: Enhanced Galileo code receiver for surveying applications

In this paper we describe the development of a low-cost high-accuracy Galileo Code receiver, user application software and positioning algorithms for land management applications, which have been implemented using a dedicated FPGA board and dual frequency Galileo E5/L1 Radio Frequency Front-End. The current situation of rural property surveying in Brazil is described and the use of code measurements from the new Galileo signals E5 AltBOC combined with E1 MBOC for use in land management applications is explored. We explain how such approach is expected to allow delivering an absolute positioning solution which could bridge the gap between receivers of high cost/complexity/accuracy based on carrier phase and receivers of lower cost/accuracy based on pseudorange observables. The system is presented together with a detailed description of main components: the Code Receiver and the Application Software. The work presented is part of an ongoing European-Brazilian consortium effort to explore the use of new Galileo for land management applications in Brazil and sponsored by the GNSS Supervisory Authority (GSA).

Fecal collection methods for the determination of protein digestibility in bullfrogs

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Multi-task control strategy for grid-tied inverters based on conservative power theory

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Design and implementation of wireless sensor networks for impedance-based structural health monitoring using ZigBee and Global System for Mobile Communications

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)